CMOS Transistor Drain Profile for High Voltage Operation

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Solution Overview

Problem

Existing semiconductor integrated circuit devices face limitations in driving high voltages due to the difficulty in increasing the working voltage without increasing the thickness of the gate oxide film, leading to restrictions on the breakdown voltage and layout area, especially when using low voltage type transistors.

Innovation Solution

The implementation of a CMOS integrated circuit structure with a first MOS type transistor having a drain profile with a low concentration region and a second MOS type transistor with the same polarity, where the gate voltage is applied through the second transistor, allowing for increased breakdown voltage without changing the oxide film thickness, and eliminating the need for additional transfer gates in the current path.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of the gate oxide film is increased to drive high voltage, then the breakdown voltage increases, but the degree of integration decreases and the transistor dimension control becomes difficult

Engineering Contradiction:
Improvebreakdown voltageVSAvoidtransistor dimension
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent applies local quality by creating a low concentration region specifically at the drain end of the transistor channel, while maintaining the original gate oxide film thickness elsewhere. This localized modification of impurity concentration allows the transistor to handle high voltages without requiring a thicker gate oxide film throughout the entire structure, thus resolving the contradiction between breakdown voltage and transistor dimension.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If additional transfer gates are added to handle high voltage signals, then the working voltage range increases, but the layout area and device complexity increase

Engineering Contradiction:
Improveworking voltage rangeVSAvoidlayout area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent changes the electrical parameters of the transistor by introducing a low concentration region at the drain end, which modifies the electric field distribution and allows the transistor to operate at higher voltages. This parameter change enables high voltage operation without adding physical components like transfer gates, thus expanding the working voltage range while keeping the layout area compact.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If double or triple gate oxide films are formed to create high voltage transistors, then the breakdown voltage increases, but the manufacturing precision decreases due to increased thickness variations

Engineering Contradiction:
Improvebreakdown voltageVSAvoidoxide film thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of forming multiple gate oxide films with different thicknesses throughout the structure, the patent applies local quality by modifying only the drain region with a low concentration region. This approach maintains uniform gate oxide film thickness across the transistor, ensuring high manufacturing precision while still achieving high breakdown voltage through localized drain region engineering.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7728386B2Semiconductor integrated circuit device
Publication Date: 2010.06.01 CETUS TECH INC
  • US7728386B2 patent drawing
  • US7728386B2 patent drawing
  • US7728386B2 patent drawing

AI summary

The invention provides a CMOS integrated circuit capable of carrying out an operation at a comparatively high supply voltage, comprising a first MOS type transistor having a drain profile to come in contact with a gate through a low concentration region having an impurity concentration which is equal to or lower than a predetermined concentration at a drain end, and a second MOS type transistor and transfer gate having the same polarity which is connected to a gate of the first MOS type transistor, wherein a gate voltage is applied to the gate of the first MOS type transistor through the second MOS type transistor and transfer gate to which a predetermined potential (a shielding voltage) is applied.