CMOS Element Integrating Organic Semiconductor Layers
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Solution Overview
Problem
The high manufacturing cost and complexity of traditional Complementary Metal Oxide Semiconductor (CMOS) elements in liquid crystal displays (LCDs) due to separate design of driving chips and substrates, and the need for costly Low Temperature Poly-silicon (LTPS) processes like laser annealing, doping, and ion implantation.
Innovation Solution
A CMOS element and its manufacturing method that integrate N-type and P-type metal oxide semiconductor layers with organic semiconductor layers on a shared substrate, eliminating the need for separate NMOS and PMOS manufacturing processes and high-cost equipment, by using a substrate with metal layers, insulation, organic semiconductor layers, and etching stoppers, simplifying the process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If LTPS technology is used to manufacture CMOS elements on substrate, then integration of driving chip and substrate is improved, but manufacturing cost increases due to complicated processes like laser annealing, doping, and ion implantation
Solution Approach 1:
The patent combines the manufacturing processes of NMOS and PMOS into a single integrated process. The dual-gate transistor structure allows both transistor types to be formed simultaneously on the same substrate using the same semiconductor layer and processing steps, eliminating the need for separate LTPS manufacturing processes for each transistor type.
Solution Approach 2:
The semiconductor layer serves multiple functions: it forms the active channel for both NMOS and PMOS transistors, and its doping state can be selectively changed to create different transistor types. The same layer structure and processing steps can produce both N-type and P-type transistors, providing universal manufacturing capability.
2Ease of manufacture
If separate design of driving chip and substrate is used, then manufacturing process is simplified, but LCD thickness increases and thin and light design becomes difficult
Solution Approach 1:
The patent merges the driving chip and substrate into a single integrated structure. The dual-gate transistors are directly formed on the substrate, eliminating the need for separate driving chip assembly. This integration significantly reduces the overall thickness and weight of the LCD while maintaining manufacturing simplicity through the unified transistor structure.
Data Source
AI summary
Disclosed is a CMOS element. The CMOS element comprises a substrate, a first metal layer, an insulation layer and a first type metal oxide semiconductor layer; and the element further comprises a first, a second and a third metal parts which are located on the insulation layer, and the first and the second metal parts are located at two sides of the first type metal oxide semiconductor layer and both contacts therewith; a second type organic semiconductor layer, located in a gap between the second, and the third metal parts and on the second, the third metal parts where are adjacent to the gap; a passivation layer, located on the first, the second and the third metal parts, the first type metal oxide semiconductor layer and the second type organic semiconductor layer; a third metal layer located on the passivation layer corresponding to the second type organic semiconductor layer.