CMOS Gate Work Function Tuning via Titanium Nitride Thickness
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Solution Overview
Problem
Current semiconductor devices face challenges in scaling down due to the complexity of work-function metal layers required for nFET, pFET, and mid gap devices, leading to issues with gate filling in narrow structures and increased leakage specifications, especially in complementary metal oxide semiconductor (CMOS) technology.
Innovation Solution
The use of a simplified gate structure comprising a high-k gate dielectric, a metal containing buffer layer, and a titanium nitride layer with adjustable thickness to achieve target work functions for n-type, p-type, and mid gap semiconductor devices, reducing the number of patterned and etch steps and enabling uniform deposition through processes like atomic layer deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple work-function metal layers are used for nFET, pFET, and mid gap devices, then different work functions can be achieved, but the gate filling becomes difficult and leakage increases
Solution Approach 1:
The patent changes the thickness parameter of a single titanium nitride layer to achieve different work functions for nFET, pFET, and mid gap devices. By varying the thickness from approximately 3-5 nm for pFET to approximately 1-3 nm for nFET, the work function is adjusted without requiring multiple metal layers, thus resolving the contradiction between adaptability and device complexity
Solution Approach 2:
The titanium nitride layer serves multiple functions: it provides work function adjustment, acts as a barrier layer, and enables uniform deposition across different device types. This single layer with variable thickness replaces the need for multiple specialized metal layers, reducing gate structure complexity while maintaining versatility
2Adaptability or versatility
If multiple work-function metal layers are used, then different work functions can be achieved, but gate filling in narrow structures becomes problematic
Solution Approach 1:
By changing the thickness parameter of the titanium nitride layer instead of using multiple metal layers, the gate structure becomes easier to fill. The single layer approach with controlled thickness (1-5 nm range) allows uniform deposition in narrow gate structures without the filling difficulties associated with multiple thicker metal layers
3Adaptability or versatility
If multiple work-function metal layers are used, then different work functions can be achieved, but leakage specifications increase
Solution Approach 1:
The patent uses thickness parameter control of the titanium nitride layer to achieve work function adjustment while maintaining low leakage. The optimized thickness range (1-5 nm) provides adequate barrier properties to prevent leakage while still enabling work function tuning, thus improving reliability compared to multiple metal layer approaches
Solution Approach 2:
The titanium nitride layer acts as a thin barrier that can be selectively removed or adjusted. This thin layer (compared to multiple metal layers) provides sufficient functionality with minimal impact on leakage, effectively serving as a disposable barrier that enables work function adjustment without compromising reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the integration of work-function adjustments, reduces the number of metal layers, and maintains acceptable leakage specifications, making it viable for advanced CMOS technology with 300 mV to 400 mV separation between n-type and p-type devices.
Implementation Method 1
adjusting the work function of the materials in the gate structure
Implementation Method 2
a gate structure is energized to create an electric field in an underlying channel region
Implementation Method 3
enabling uniform deposition through processes like atomic layer deposition
Data Source
AI summary
An electrical device that includes a p-type semiconductor device having a p-type work function gate structure including a first high-k gate dielectric, a first metal containing buffer layer, a first titanium nitride layer having a first thickness present on the metal containing buffer layer, and a first gate conductor contact. A mid gap semiconductor device having a mid gap gate structure including a second high-k gate dielectric, a second metal containing buffer layer, a second titanium nitride layer having a second thickness that is less than the first thickness present, and a second gate conductor contact. An n-type semiconductor device having an n-type work function gate structure including a third high-k gate dielectric present on a channel region of the n-type semiconductor device, a third metal containing buffer layer on the third high-k gate dielectric and a third gate conductor fill present atop the third metal containing buffer layer.