CMOS Image Sensor Gated Storage Node for kTC Noise Reduction
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Solution Overview
Problem
CMOS imager pixels have low signal-to-noise ratios and narrow dynamic range due to inadequate charge collection, transfer, and storage, along with kTC noise issues during reset, which limits their ability to fully utilize the charge generated by photosensors.
Innovation Solution
Incorporating a global electronic shutter and a gated storage node between the photosensor and floating diffusion node, allowing for double sampling and increased charge storage capacity by separating the storage node with additional depletion area and sharing floating diffusion nodes and reset/readout circuitry among multiple pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a traditional floating diffusion node is used for charge storage, then the pixel structure is simple, but the charge storage capacity is limited and kTC noise is generated during reset
Solution Approach 1:
The pixel is divided into two separate storage nodes: a floating diffusion node for signal readout and a gated storage node for charge accumulation. This segmentation allows each node to be optimized for its specific function, increasing overall charge storage capacity while maintaining manageable structural complexity through modular design
Solution Approach 2:
The gated storage node is implemented by nesting an additional depletion area within the pixel structure, surrounded by gates that control charge transfer. This nested configuration allows the storage function to be integrated within the existing pixel architecture without requiring completely separate external components
2Adaptability or versatility
If additional gates are added to increase functional operations of the pixel, then electronic shuttering capability is improved, but the pixel size increases or fill factor is reduced
Solution Approach 1:
The gated storage node structure serves multiple functions simultaneously: it provides charge storage capacity, enables electronic shuttering through gate control, and maintains pixel compactness. The same gate structure that defines the storage node also controls the electronic shutter operation, eliminating the need for separate dedicated shutter components
Solution Approach 2:
The gate structure is positioned in the vertical dimension above the depletion area, controlling charge transfer through the third dimension rather than requiring lateral expansion. This vertical gate configuration enables shuttering functionality without increasing the horizontal pixel footprint, maintaining high fill factor
3Measurement precision
If charge is transferred directly from photosensor to floating diffusion node, then the transfer path is short, but the signal-to-noise ratio is low and dynamic range is narrow
Solution Approach 1:
The gated storage node acts as an intermediary between the photosensor and floating diffusion node. Charges are first transferred to the storage node where they can be accumulated and stabilized, then subsequently transferred to the floating diffusion node for readout. This intermediate storage step allows for better charge collection efficiency and reduced noise while maintaining a relatively short total transfer path through controlled sequential transfer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces kTC noise, increases charge storage capacity, and enhances the signal-to-noise ratio and dynamic range, enabling more efficient charge collection and transfer while reducing pixel size and noise.
Implementation Method 1
each cell includes a photosensor, for example, a photogate, photoconductor or a photodiode overlying a substrate for producing a photo-generated charge
Implementation Method 2
The storage node is formed by an additional depletion area between the photosensor and floating diffusion node
Implementation Method 3
This area is separated from the photodiode and floating diffusion node by gates: (1) a storage gate that covers both a barrier (from opposingly doped silicon) and the storage node and (2) a transfer gate that separates the storage node from the floating diffusion node
Data Source
AI summary
A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutter gate on during the integration period to increase the amount of time for charge storage by a pixel.


