CMOS GOA Circuit with Dual Falling Edge Waveform
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional CMOS Gate Driver on Array (GOA) circuits experience voltage coupling issues when turning on and off scanning lines, leading to inconsistent voltage between pixel electrodes and data lines, causing un-uniformity in liquid crystal display panels due to manufacturing deviations.
Innovation Solution
A CMOS GOA circuit design featuring a plurality of cascaded GOA units, each comprising a forward-rearward control module, signal-latch module, signal-process module, and signal-buffer module, which outputs a scan-line driving signal with a waveform having two falling edges, reducing voltage coupling by using a thin film transistor group and specific voltage signals to manage the gate-electrode driving signal, high voltage signals, and clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional scan-line driving signals are used to charge pixel electrodes, then the pixel electrodes can be charged, but voltage coupling occurs when turning on and off scanning lines, causing inconsistent voltage between pixel electrodes and data lines
Solution Approach 1:
The patent applies periodic action by using a scan-line driving signal with two falling edges instead of a single falling edge. The first falling edge turns off the scanning line to charge the pixel electrode, and the second falling edge turns on the scanning line again to reduce voltage coupling. This periodic switching action allows the pixel electrode voltage to be stabilized at a level closer to the data line voltage, eliminating voltage inconsistency while maintaining the charging function.
2Object-generated harmful factors
If a waveform with two falling edges is used to lower voltage coupling, then voltage coupling is reduced, but the conventional GOA circuit structure cannot support this waveform
Solution Approach 1:
The patent applies dynamics by modifying the scan-line driving signal waveform to have two falling edges, transforming the static single-edge waveform into a dynamic multi-edge waveform. This dynamic waveform control allows the circuit to adaptively manage voltage coupling by switching the scanning line between different states (on and off) at different times, thereby reducing voltage coupling without requiring fundamental changes to the GOA circuit structure.
3Manufacturing precision
If common electrode voltage is adjusted to compensate for voltage coupling difference, then voltage consistency can be maintained, but manufacturing process deviations cause larger voltage coupling effects
Solution Approach 1:
The patent applies preliminary action by proactively reducing voltage coupling through the two falling edges waveform before the voltage inconsistency can fully develop. Instead of waiting for voltage coupling to occur and then compensating by adjusting common electrode voltage, the dual falling edge waveform preemptively controls the scanning line switching to minimize voltage coupling at its source. This approach is less sensitive to manufacturing process deviations because it addresses the root cause rather than the symptom.
Data Source
AI summary
A Complementary Metal-Oxide-Semiconductor (CMOS) Gate Driver on Array (GOA) circuit includes a plurality of cascaded GOA units, where each of the GOA units comprises a forward-rearward control module, a signal-latch module, a signal-process module, and a signal-buffer module. A waveform of a scan-line driving signal outputted has two falling edges, to prevent un-uniformity of a liquid crystal panel display by decreasing high-shift voltage value of the pixel electrodes caused by the voltage coupling while charging pixel electrodes.