CMOS GOA Circuit Latch Module Merging Reset Function
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Solution Overview
Problem
The existing CMOS GOA circuits require an independent reset module to manage scan driving signals, increasing complexity and area, which hinders the design of narrow frame panels.
Innovation Solution
A CMOS GOA circuit with a NOR gate and storage capacitor, eliminating the need for a reset module by using a global signal to control scan driving signals and store voltage levels, thereby simplifying the circuit and reducing components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an independent reset module is added to manage scan driving signals, then the reliability of signal control is improved, but the device complexity and area increase
Solution Approach 1:
The patent merges the reset function into the existing latch module by adding a reset signal input端 to the latch module. This allows the latch module to perform both latching and resetting functions, eliminating the need for a separate reset module and reducing circuit complexity while maintaining signal control reliability
Solution Approach 2:
The latch module is designed to be multi-functional, handling both normal signal latching during operation and reset signal processing when needed. This universal design enables one module to serve multiple purposes, reducing the overall number of components required in the GOA circuit
2Reliability
If an independent reset module is added to manage scan driving signals, then the reliability of signal control is improved, but the area of the GOA circuit increases
Solution Approach 1:
The reset function is merged into the latch module structure, sharing the same physical space and components. This integration eliminates the additional area that would be required for a separate reset module, thereby reducing the overall GOA circuit area while maintaining reliable signal control
Solution Approach 2:
The latch module is designed as a multi-functional unit that handles both latching and resetting operations. This universal design reduces the total component count and minimizes the circuit area required, making it suitable for space-constrained narrow frame panel applications
3Adaptability or versatility
If additional components and wirings are added to the GOA unit, then the signal control capability is improved, but the ease of manufacture deteriorates
Solution Approach 1:
The patent combines the reset functionality with the existing latch module structure, requiring minimal additional components (primarily a reset signal input端 and associated transistors). This merging approach maintains enhanced signal control capability while avoiding the manufacturing complexity that would arise from completely separate reset modules
Solution Approach 2:
The multi-functional latch module design allows the same structural framework to handle both normal operation and reset conditions. This universality simplifies the manufacturing process by reducing the variety of different component types and assembly steps required, while still providing comprehensive signal control capability
Data Source
AI summary
The present invention provides a CMOS GOA circuit. The latch module (3) comprises a NOR gate (Y), and the two input ends of the NOR gate (Y) are respectively inputted with the inverted stage transfer signal (XQ(N)) and the global signal (Gas). When the global signal (Gas) is high voltage level, all the scan driving signals (G(N)) of the respective stages are controlled to be raised up to high voltage levels at the same time, and meanwhile, the NOR gate (Y) is controlled to pull down voltage levels of the stage transfer signals (Q(N)) of the respective stages to clear and reset the stage transfer signals (Q(N)) of the respective stages. In comparison with prior art, an independent reset module is not required. The additional components, wirings, and reset signal are eliminated to reduce the rear of the GOA circuit, and simplify the complexity of the signal, which is beneficial to the design of narrow frame panel; besides, by locating the storage capacitors (7) to store the low voltage level of the stage transfer signal (Q(N)) as all the scan driving signals (G(N)) of the respective stages are raised up to high voltage levels at the same time to promote the stability of the GOA circuit.