CMOS Image Sensor Charge Storage Regions for Reduced Dark Current
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Solution Overview
Problem
Current CMOS imaging arrays face challenges in reducing pixel size while maintaining light sensitivity, as smaller pixel sizes increase dark current to light current ratios and are limited by dead space and shallow trench isolation, which affects camera resolution and cost.
Innovation Solution
The use of charge storage regions with a common circuit node and reduced dead space between photodiodes, eliminating shallow trench isolation and utilizing a capacitive transimpedance amplifier for efficient charge conversion, allows for smaller pixel sizes with reduced dark current and increased light sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the size of pixels in the imaging array is reduced to increase the number of pixels, then the area of silicon is reduced and cost decreases, but the light sensitivity of the array decreases due to increased dark current to light current ratio
Solution Approach 1:
The patent introduces a vertical barrier region between adjacent photodiodes that extends into the substrate, creating a three-dimensional solution to the two-dimensional pixel layout problem. This vertical structure reduces dead space horizontally while maintaining photodiode area, thereby improving light sensitivity without increasing pixel footprint.
Solution Approach 2:
The patent extracts the isolation function from the traditional shallow trench isolation structure and implements it through a dedicated barrier region filled with isolation material. This separates the photodiodes more effectively by removing the harmful interface between STI and photodiode sidewalls, thereby reducing dark current generation while maintaining compact pixel design.
2Reliability
If shallow trench isolation is used to isolate individual photodiodes, then photodiodes are isolated, but dark current generation increases at the interface between STI and photodiode sidewall
Solution Approach 1:
The patent introduces a barrier region filled with isolation material as an intermediary structure between adjacent photodiodes. This barrier region acts as a mediator that provides electrical isolation while eliminating the direct interface between STI and photodiode sidewalls, thereby preventing dark current generation at the harmful interface.
Solution Approach 2:
The patent converts the potentially harmful interface between STI and photodiode sidewalls into a beneficial barrier region filled with isolation material. By intentionally creating this structured interface with proper material selection and geometry, the harmful dark current generation is eliminated while maintaining effective isolation.
3Productivity
If dead space between photodiodes is reduced to increase pixel density, then more pixels fit in the same area, but dark current increases due to increased interface area ratio
Solution Approach 1:
The patent solves the dead space problem by transitioning from horizontal isolation to vertical isolation. The barrier region extends vertically into the substrate, providing isolation without occupying horizontal space between photodiodes. This allows maximum pixel density while maintaining effective isolation and reducing dark current.
4Area of stationary object
If the area of the photodiode is reduced to decrease pixel sensor area, then silicon area is reduced, but light sensitivity decreases
Solution Approach 1:
The patent compensates for reduced photodiode area by introducing vertical barrier regions that improve charge collection efficiency. The vertical structure creates additional charge collection pathways and reduces recombination losses, thereby maintaining light sensitivity even with smaller photodiode footprints.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables smaller pixels with reduced dark current and improved light sensitivity, effectively addressing the limitations of existing technologies by eliminating dead space and minimizing dark current generation, thereby enhancing camera resolution and reducing production costs.
Implementation Method 1
Each pixel sensor includes a photodiode that converts light to an electronic charge that is stored in the photodiode until the photodiode is readout
Implementation Method 2
a charge-to-voltage conversion circuit connected to the common circuit node. The charge-to-voltage circuit generates an output voltage related to a charge on the common circuit node
Data Source
Figure 1
Figure 2
Figure 3~5B
AI summary
A photosensor and an imaging array utilizing the same are disclosed. The photosensor[150] includes a light conversion region[151] that has separate charge storage regions [172-174]. The light conversion region includes a plurality of separate charge storage regions [172-174] within a doped region[151], each charge collection region being doped such that the mobile charges generated by light striking that charge storage region are prevented from moving to an adjacent charge storage region. The photosensor also includes a plurality of transfer gates[152, 153, 154], having a gate region adjacent to a corresponding one of the charge storage regions and disposed between that charge storage region and a drain region[162-164]. The charge collection regions and the drain regions are doped such that the mobile charges collected in the charge storage region will flow to the drain region when a first electric field is applied to the gate region.