CMOS Image Sensor Black Level Calibration Circuit
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Solution Overview
Problem
CMOS image sensors face challenges in providing reliable and accurate dark voltage current for black level calibration, which affects image resolution and cost efficiency as they integrate with other semiconductor circuits in nanometer technology process nodes.
Innovation Solution
Incorporating a black level calibration circuit with a dark voltage current sensing circuit, including photo diodes and a light shield structure, surrounded by isolation structures and seal ring structures to isolate and correct signals, enhancing quantum efficiency and image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CMOS image sensors are integrated with other semiconductor circuits in nanometer technology process nodes, then device density and integration are improved, but reliability and accuracy of dark voltage current for black level calibration deteriorate
Solution Approach 1:
The patent divides the image sensor into distinct functional regions: a pixel area containing photo diodes for light sensing, and a separate black level calibration area containing dedicated sensing circuits and light shield structures. This segmentation isolates the calibration function from the pixel array, allowing independent optimization of dark voltage current accuracy without compromising overall device density.
Solution Approach 2:
The patent introduces intermediate structures including light shield structures that block stray light from reaching calibration photo diodes, and isolation structures that electrically separate the calibration circuit from the pixel circuit. These intermediary elements ensure that dark voltage current measurements are not contaminated by signal interference or stray light, maintaining measurement accuracy in high-density integrated designs.
2Measurement precision
If black level calibration circuit is added to improve image quality, then image resolution and quantum efficiency are improved, but device complexity increases
Solution Approach 1:
The patent merges the black level calibration function with the existing pixel structure by using the same substrate and forming photo diodes in the calibration area using similar processes as the pixel photo diodes. The calibration circuit shares common fabrication steps with the pixel array, including photodiode formation, color filter deposition, and micro lens formation, thereby reducing overall device complexity despite adding calibration functionality.
Solution Approach 2:
The patent designs the calibration area to serve multiple functions: it provides dark voltage current sensing, acts as a reference for black level calibration, and functions as a light-blocking region. The same structural elements (photo diodes, isolation structures, seal ring structures) serve both pixel array and calibration functions, reducing the need for additional dedicated components and simplifying the overall device architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a reliable dark voltage current for accurate black level calibration, improving image resolution and reducing costs by enhancing quantum efficiency and signal processing in CMOS image sensors.
Implementation Method 1
a dark current sensing circuit including one or more photo diodes disposed in the substrate
Implementation Method 2
a light shield structure disposed over the first principal surface and covering the dark current sensing circuit
Data Source
AI summary
An image sensor includes a substrate having first and second surfaces opposite to each other, an image pixel area, and a black level calibration (BLC) area adjacent to the image pixel area. The BLC area includes a dark current sensing circuit including photo diodes disposed in the substrate, a first seal ring disposed over the second surface and surrounding the image pixel area in plan view, a second seal ring disposed over the second surface and surrounding the image pixel area in plan view such that the dark current sensing circuit is disposed between the first and second seal rings, an opaque cover disposed over the first surface and covering the dark current sensing circuit, the first and second seal rings, and one or more first trench isolation structures extending from the first surface to an inside the substrate and disposed between the first seal ring and the opaque cover.