CMOS Image Sensor CDS Capacitor Noise Reduction
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Solution Overview
Problem
Image sensors, particularly CMOS-based systems, face issues with fixed pattern noise and thermal noise, which affect the integrity of output image signals due to variations in photodiode performance and random thermal electron movement, respectively.
Innovation Solution
The implementation of a correlated double-sampling (CDS) capacitor system with a reset capacitor, integrating amplifier, and hold capacitor, allowing for the subtraction of dark signals and thermal noise from the total signal, using a pixel amplifier that can switch between standby and power modes to optimize signal readout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If dark signal subtraction is implemented to reduce fixed pattern noise and thermal noise, then signal integrity is improved, but readout time increases due to requiring multiple capacitors and readout cycles
Solution Approach 1:
The patent combines the dark signal storage function and total signal storage function into a single holding capacitor by using different voltage levels to represent different signal states. The capacitor holds both the dark signal (when charged to a first voltage level) and the total signal (when charged to a second voltage level), eliminating the need for separate capacitors and reducing readout time while maintaining signal integrity through noise subtraction.
2Measurement precision
If multiple holding capacitors are used to store dark signal and total signal separately, then noise subtraction accuracy is improved, but device complexity increases
Solution Approach 1:
The holding capacitor is designed to perform multiple functions: it can store both the dark signal and the total signal by switching between different voltage levels. This multi-functional approach eliminates the need for separate capacitors for dark signal and total signal storage, reducing device complexity while maintaining the accuracy required for noise subtraction through its ability to hold both signal types.
3Speed
If amplifier remains in power mode during standby to maintain signal readiness, then signal response time is improved, but energy consumption increases
Solution Approach 1:
The amplifier operates in a dynamic manner, switching between a low-power standby mode and a full-power signal readout mode based on operational requirements. During standby, the amplifier remains in a reduced-power state to minimize energy consumption while maintaining the capability to quickly transition to full operational mode when signal readout is required, thus balancing energy efficiency with responsive performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces noise by isolating and subtracting dark signals and thermal noise, improving signal integrity and reducing readout time, compared to existing methods that require multiple capacitors and increased readout cycles, thereby enhancing image quality and efficiency.
Implementation Method 1
CMOS, the photosites include photodiodes, which output a charge in response to light impinging thereon
Implementation Method 2
A first reset capacitor, selectably associated with the first photodiode, flushes charge on the first photodiode through the first integrating amplifier
Implementation Method 3
A first CDS capacitor is downstream of the first integrating amplifier
Implementation Method 4
A hold capacitor forms a hold node downstream of the first CDS capacitor
Data Source
AI summary
An imaging apparatus, such as useable in a digital camera or input scanner, comprises a first photodiode and a first integrating amplifier associated therewith. A first reset capacitor, selectably associated with the first photodiode, flushes charge on the first photodiode through the first integrating amplifier. A first CDS capacitor is downstream of the first integrating amplifier. A hold capacitor forms a hold node downstream of the first CDS capacitor. A pixel amplifier reads out a signal from the hold node at a predetermined time. The pixel amplifier is selectably controllable between a standby mode and a power mode.