CMOS Image Sensor Deep Well Placement for Cross-Talk Reduction
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Solution Overview
Problem
Conventional CMOS image sensors face issues with reduced sensitivity and cross-talk due to the uniform distribution of deep well regions, which allow electron-hole pairs generated by long-wavelength light to be diffused into adjacent pixels, reducing image sensitivity and causing interference.
Innovation Solution
A CMOS image sensor design where a deep well of higher impurity concentration is strategically located only in a portion of each pixel, either under the device isolation layer or adjacent to the photoelectric converter, preventing electron diffusion to adjacent pixels and enhancing sensitivity while applying a ground voltage to control electron movement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep well regions are uniformly distributed throughout the pixel region, then the depletion layer is controlled and leakage current is prevented, but electron-hole pairs generated by long-wavelength light are diffused into adjacent pixels causing cross-talk and reduced sensitivity
Solution Approach 1:
The patent applies local quality by making the deep well region non-uniform in distribution. Specifically, the deep well is positioned only in a portion of each pixel (e.g., beneath the transistor region) rather than being uniformly distributed across the entire pixel area. This localized placement maintains leakage current prevention in the transistor region while avoiding electron-hole pair diffusion into adjacent photodiode regions, thereby resolving the contradiction between reliability and manufacturing precision.
2Stability of the object's composition
If deep well regions are uniformly distributed, then device isolation is maintained, but cross-talk occurs between adjacent pixels due to electron diffusion under the device isolation layer
Solution Approach 1:
The patent implements local quality by concentrating the deep well region in specific areas (such as beneath transistors) while leaving other areas (particularly photodiode regions) without deep wells. This selective placement maintains device isolation where transistors are located while preventing cross-talk between adjacent pixels by avoiding deep well regions that would cause electron diffusion under the device isolation layer into neighboring pixels.
3Use of energy by moving object
If long-wavelength light enters the sensor, then penetration depth increases and more light is absorbed, but electron-hole pairs are generated away from the photodiode where they cannot be collected
Solution Approach 1:
The patent applies local quality by creating spatial variation in the deep well region placement. By positioning deep wells only in non-photodiode areas (such as beneath transistors or in specific portions of pixels), the structure allows long-wavelength light to penetrate deeply and generate electron-hole pairs throughout the silicon layer, while ensuring that generated carriers in photodiode regions remain close to collection points without being lost to adjacent pixels through deep well-induced diffusion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves image sensitivity by ensuring electron-hole pairs are captured within their respective pixels, reducing cross-talk and enhancing the overall performance of the CMOS image sensor.
Implementation Method 1
a photoelectric converter located in each of the plurality of pixels in the semiconductor layer and includes a region doped with impurities of a second conductivity type
Implementation Method 2
a deep well of a first conductivity type located in a lower position than the photoelectric converter in the semiconductor layer and has a higher impurity concentration than that of the semiconductor layer
Data Source
AI summary
A complementary metal-oxide silicon (CMOS) image sensor includes a semiconductor layer of a first conductivity type, a plurality of pixels located in the semiconductor layer, a photoelectric converter located in each of the plurality of pixels in the semiconductor layer and includes a region doped with impurities of a second conductivity type. The CMOS image sensor further includes a deep well of a first conductivity type located in a lower position than the photoelectric converter in the semiconductor layer and has a higher impurity concentration than that of the semiconductor layer. The deep well is located only in a portion of each of the plurality of pixels.