CMOS Image Sensor Digital Double Sampling Counter
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Solution Overview
Problem
CMOS image sensors face challenges with high power consumption and large area occupation due to the use of up-down counters for digital double sampling, especially in high-resolution image sensors.
Innovation Solution
A digital double sampling method and CMOS image sensor design that employs a counter using the two's complement number system, inverting digital data, and counting in synchronization with a clock signal, reducing the number of gates and power consumption by performing the function of an up-down counter with a counter that counts in one direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an up-down counter is used to perform digital double sampling, then the counter can perform both up-count and down-count functions, but the counter occupies a relatively large area and has a relatively large number of gates
Solution Approach 1:
The patent segments the counter operation into two separate phases: a first counting operation (up-count or down-count) and a second counting operation (opposite direction). By dividing the counting function into sequential stages rather than requiring simultaneous bidirectional capability, the counter can use simpler circuitry with fewer gates and smaller area while achieving the same digital double sampling result.
Solution Approach 2:
The patent inverts the conventional approach by performing two sequential counting operations in opposite directions rather than requiring a single counter to handle both directions simultaneously. The first count establishes a reference value, then the second count in the opposite direction produces the final differential result, eliminating the need for complex bidirectional counter logic.
2Measurement precision
If an up-down counter is used to perform digital double sampling, then the counter can obtain the difference between digital data, but power consumption increases
Solution Approach 1:
The patent divides the power-consuming bidirectional counting operation into two separate, sequential unidirectional counting phases. Each phase uses simpler counter logic that consumes less power individually, and the sequential execution allows for better power management. The first counting phase establishes a reference, and the second phase completes the differential measurement, achieving the same precision with reduced total power consumption.
Solution Approach 2:
The patent employs periodic, sequential counting operations rather than continuous bidirectional counting. The counter performs a first counting operation during a first period, then performs a second counting operation during a second period. This periodic approach allows the circuit to settle between operations and reduces average power consumption compared to maintaining continuous bidirectional counting capability.
Data Source
AI summary
A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.