CMOS Image Sensor Drive Transistor FinFET Blocking Layer
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in maintaining the matching property of drive transistors as pixel size decreases, leading to noise and degraded image quality due to back bias effects and limitations in scaling down the photodiode size, which affects the fill factor and overall image quality.
Innovation Solution
The implementation of a CMOS image sensor with a drive transistor configured as a FINFET, incorporating a blocking layer between the active region and the gate electrode, and a metal contact electrically connected to the gate electrode but not the active region, which suppresses the back bias effect and enhances the matching property of the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the pixel size is reduced to increase the number of pixels, then the integration density is improved, but the matching property of drive transistors deteriorates due to back bias effects
Solution Approach 1:
The gate electrode is extended into the trench region beneath the blocking layer, creating a three-dimensional gate structure. This dimensional change allows the gate to control the active region more effectively without increasing the planar footprint, thereby maintaining transistor matching properties while enabling pixel scaling.
Solution Approach 2:
A blocking layer is introduced between the metal contact and the active region to prevent direct electrical connection. This intermediary layer allows the gate electrode to extend beneath the contact without creating unwanted electrical paths, enabling the gate to maintain control over the active region while preventing back bias effects that would degrade transistor matching.
2Productivity
If the photodiode size is reduced to increase the fill factor, then the photosensitivity is improved, but the image quality deteriorates due to noise
Solution Approach 1:
The gate structure extends vertically into the trench region, utilizing the third dimension to provide enhanced gate control. This allows for smaller photodiode areas while maintaining sufficient transistor control to prevent noise generation, thereby improving fill factor without sacrificing image quality.
3Reliability
If the gate electrode is extended beneath the metal contact, then the control over active region is improved, but the risk of electrical connection to active region increases
Solution Approach 1:
The blocking layer serves as an electrical insulator positioned between the metal contact and the active region. This intermediary prevents direct electrical connection while allowing the gate electrode to extend beneath the contact, maintaining control over the active region without creating harmful electrical paths.
4Productivity
If the pixel size is scaled down, then the integration density is improved, but the back bias effect increases leading to noise
Solution Approach 1:
The gate structure transitions from a planar configuration to a three-dimensional structure extending into the trench. This dimensional change enhances gate control efficiency, allowing for reduced pixel size while maintaining sufficient control to minimize back bias effects and associated noise.
Solution Approach 2:
The blocking layer acts as an intermediary that prevents direct electrical interaction between the metal contact and active region. This isolation reduces the back bias effect that would otherwise be exacerbated by scaled-down dimensions, thereby reducing noise while maintaining high integration density.
Data Source
AI summary
There are provided a CMOS image sensor and a method for fabrication thereof. The CMOS image sensor having a reset transistor, a select transistor, a drive transistor and a photodiode, includes an active region in shape of a line, a gate electrode of the drive transistor, which is intersected with the active region, a blocking layer interposed between the active region and the gate electrode in which the blocking layer is formed on an intersection region of the active region and the gate electrode, and a metal contact electrically connected to the gate electrode, wherein the metal contact is not electrically connected to the active region by the blocking layer.


