CMOS Image Sensor Full-Well-Capacity via Shallow Pinning Layer
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in increasing full-well-capacity without introducing image lag, diode leakage, and defects, particularly as pixel size decreases, leading to lower dynamic range and signal-to-noise ratio.
Innovation Solution
The solution involves forming a very shallow pinning layer with an abrupt p-n junction by reordering the pinning layer implantation after sidewall spacer formation, using a thinned sidewall spacer, and implanting dopants at a small angle to maintain an abrupt dopant profile, which increases full-well-capacity without thermal processing changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the doping level of the N-type PD region is increased to increase full-well-capacity, then the full-well-capacity is improved, but image lag and diode leakage current increase
Solution Approach 1:
The patent divides the doped region into multiple segments: a first doped region with a first doping level and a second doped region with a second doping level. This segmentation allows different portions of the photodiode to have different doping characteristics, enabling high full-well-capacity in one region while maintaining low image lag and leakage in another region.
Solution Approach 2:
The patent applies local quality by creating regions with different doping levels at different locations within the photodiode structure. The first doped region has a specific doping level optimized for charge storage capacity, while the second doped region has a different doping level optimized for reducing image lag and leakage current, allowing each local region to perform its specific function optimally.
2Productivity
If pixel size is reduced to increase pixel density, then pixel density is improved, but full-well-capacity decreases
Solution Approach 1:
The patent implements a nested structure where a second doped region is formed within or adjacent to the first doped region. This nested arrangement allows multiple functional regions to be packed into a smaller area, enabling high pixel density while maintaining sufficient full-well-capacity through the combined volume of the nested doped regions.
Solution Approach 2:
The patent extends the doping structure into multiple dimensions by creating vertically stacked or laterally adjacent doped regions with different doping levels. This multi-dimensional approach allows the photodiode to accumulate charge in multiple spatial dimensions, increasing full-well-capacity without increasing the planar pixel footprint.
3Quantity of substance
If multiple p-n-p-n junctions are used to increase PD region size, then full-well-capacity is improved, but fabrication complexity increases
Solution Approach 1:
The patent merges multiple doping operations into a unified structure where first and second doped regions are formed in close proximity or overlap. This merging approach creates the effect of multiple junctions and increased charge storage capacity while using a streamlined fabrication process that forms both regions in an integrated manner, reducing overall fabrication complexity.
Solution Approach 2:
The patent creates a multi-functional doped region structure where the first and second doped regions serve multiple purposes simultaneously: the first region provides primary charge storage capacity while the second region provides both additional storage and leakage reduction. This multi-functionality eliminates the need for separate structures for each function, simplifying the overall device design and fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the full-well-capacity of CMOS image sensors while maintaining image quality, reducing dark current and white pixels, and improving blue sensitivity without degrading logic circuit performance.
Implementation Method 1
implanting dopants at a small angle to maintain an abrupt dopant profile
Data Source
AI summary
An image sensor with a high full-well capacity includes a photosensitive region, a transfer gate, and sidewall spacers. The photosensitive region is formed to accumulate an image charge in response to light. The transfer gate disposed adjacent to the photosensitive region and coupled to selectively transfer the image charge from the photosensitive region to other pixel circuitry. First and second sidewall spacers are disposed on either side of the transfer gate. The first sidewall spacer closest to the photosensitive region is narrower than the second sidewall spacer. In some cases, the first sidewall spacer may be omitted.