CMOS Image Sensor Device Isolating Implant Area for Dark Current Reduction

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Solution Overview

Problem

CMOS image sensors experience deteriorated low-light level characteristics due to dislocations in the silicon lattice structure caused by the etching process during device isolating layer formation, which act as electron traps, reducing the sensor's ability to convert small light quantities effectively.

Innovation Solution

A device isolating implant area is formed by ion implantation between adjacent photodiode areas, using a combination of p-type and n-type diffusion areas, and applying a reverse bias voltage to create a depletion layer that electrically isolates photodiodes, minimizing crystal defects and interface traps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a device isolating layer is formed by STI etching process, then device isolation is achieved, but dislocations in silicon lattice occur causing electron traps that deteriorate low-light level characteristics

Engineering Contradiction:
Improvedevice isolationVSAvoidelectron traps from lattice dislocation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the harmful etching process from the device isolation formation method. Instead of using STI etching that creates lattice dislocations, the invention uses ion implantation to directly create the isolating region without the harmful intermediate steps, thereby removing the source of electron traps while maintaining device isolation functionality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/chemical etching process with an ion implantation process. This substitution changes the fundamental mechanism from removing material through etching to modifying the silicon lattice through controlled ion bombardment, which achieves isolation without creating the same type of lattice dislocations that trap electrons

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If device isolating layer is formed to isolate photodiodes, then electrical isolation is achieved, but crystal defects and interface traps are generated reducing light conversion efficiency

Engineering Contradiction:
Improveelectrical isolation of photodiodesVSAvoidcrystal defect density
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the fundamental parameters of the isolation process by using ion implantation with specific energy levels and doses to modify the silicon lattice. This creates a depleted region for electrical isolation while maintaining better crystal structure integrity compared to etching methods, thereby reducing interface traps and improving light conversion efficiency

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the low-light level performance of CMOS image sensors by reducing dark current and interface traps, enhancing the sensor's ability to capture and convert light in low-light environments.

Implementation Method 1

A device isolating implant area is formed by ion implantation between adjacent photodiode areas

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

applying a reverse bias voltage to create a depletion layer that electrically isolates photodiodes

Methodology Applied
Scientific EffectDepletion layer formation: Electric Field

Implementation Method 3

an image sensor is a semiconductor device converting an optical image into an electrical signal

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS7855407B2CMOS image sensor and method for manufacturing the same
Publication Date: 2010.12.21 MARVELL ASIA PTE LTD
  • US7855407B2 patent drawing
  • US7855407B2 patent drawing
  • US7855407B2 patent drawing

AI summary

Embodiments relate to a Complementary Metal Oxide Semiconductor (CMOS) image sensor, and to a method for manufacturing the same, that improves the low-light level characteristics of the CMOS image sensor. The CMOS image sensor has a photosensor unit and a signal processing unit, and may include a semiconductor substrate having a device isolating implant area provided with a first ion implant area and a complementary second ion implant area within the first ion implant area; a device isolating layer in the signal processing unit; a photodiode in the photosensor unit; and transistors in the signal processing unit. A crystal defect zone neighboring the photodiode may be minimized using the device isolating implant area between adjacent photodiodes so that a source of dark current can be reduced and the occurrence of interface traps can be prevented, making it possible to improve the low-light level characteristics of the image sensor.