CMOS Image Sensor Isolation Structure for Full Well Capacity
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Solution Overview
Problem
CMOS image sensors face challenges with full well capacity (FWC) and narrow width effect (NWE) issues due to the use of shallow trench isolation (STI) regions, which affect pixel performance and dynamic range, leading to potential saturation and image smearing.
Innovation Solution
The design incorporates implanted device isolation regions that are not STI, with a continuous volume directly below the channel region, preventing lateral diffusion and maintaining channel width, thus enhancing FWC and reducing NWE.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shallow trench isolation (STI) regions are used to isolate photosensitive regions, then device isolation and electrical separation are achieved, but full well capacity is reduced and narrow width effect occurs
Solution Approach 1:
The isolation structure is segmented into multiple components: a first isolation layer filling the trench region providing electrical isolation, and a second isolation layer extending laterally beyond the trench to prevent lateral diffusion. This segmentation allows each layer to perform its specific function optimally without compromising full well capacity.
Solution Approach 2:
The isolation structure transitions from a purely vertical trench fill to a multi-dimensional structure where the second isolation layer extends laterally beyond the trench boundaries. This dimensional extension provides isolation functionality without occupying vertical space that would reduce photosensitive region volume and full well capacity.
2Reliability
If shallow trench isolation (STI) regions are used to isolate photosensitive regions, then device isolation is achieved, but channel width is reduced due to lateral diffusion
Solution Approach 1:
The second isolation layer is formed to extend laterally beyond the trench region before the photosensitive regions are fully processed. This preliminary extension creates a barrier that prevents subsequent lateral diffusion of dopants or other materials, preserving the intended channel width throughout the fabrication process.
Solution Approach 2:
The second isolation layer acts as an intermediary barrier between the STI trench structure and the photosensitive regions. It mediates the isolation function by providing a lateral diffusion barrier that protects the channel region while allowing the trench structure to provide vertical electrical isolation.
3Quantity of substance
If larger photosensitive regions are maintained to increase full well capacity, then dynamic range improves, but device isolation and prevention of crosstalk become more difficult
Solution Approach 1:
The isolation structure exhibits local quality variations: the first isolation layer provides dense electrical isolation within the trench region directly between photosensitive regions, while the second isolation layer provides lateral containment at the boundaries. This localized functional differentiation achieves both isolation and large photosensitive region area.
Solution Approach 2:
The isolation structure is nested with the first isolation layer (trench fill) contained within the broader footprint of the second isolation layer. This nested arrangement allows the compact first layer to provide electrical isolation while the larger second layer provides lateral containment, enabling large photosensitive regions without crosstalk.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves pixel performance by maintaining larger photosensitive regions, increasing full well capacity, and reducing the narrow width effect, resulting in better signal-to-noise ratio and dynamic range without silicon surface damage.
Implementation Method 1
preventing lateral diffusion and maintaining channel width
Implementation Method 2
Image sensors may be semiconductor devices that convert optical images into electrical signals
Data Source
AI summary
A complementary metal oxide semiconductor (CMOS) image sensor and a method for fabricating the same are provided. An example CMOS image sensor includes first active regions of a semiconductor substrate, where the first active regions are arranged in rows or columns. Photosensitive regions are formed in the first active regions. The CMOS image sensor also includes second active regions of the semiconductor substrate that are interposed between the first active regions. Each of the second active regions includes a device isolation region formed by doping the semiconductor substrate with impurities. Each of the second active regions also includes a channel region of a field effect transistor (FET) that is formed within the device isolation region and is configured to connect source and drain regions of the FET. At least one control gate is formed over each of the second active regions.


