CMOS Image Sensor Device Isolation Structure for Pixel Isolation

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Solution Overview

Problem

The challenge in developing high-density, highly-integrated CMOS image sensors is to achieve efficient device isolation and impurity concentration control while maintaining low power consumption and integrating signal processing circuits, which existing technologies have not adequately addressed.

Innovation Solution

The proposed solution involves a CMOS image sensor design with a substrate having a device isolation structure that includes an insulating gapfill layer extending from the top to the bottom surface, a spacer between the gapfill layer and the substrate, and impurity regions of varying conductivity types and concentrations, along with a readout circuit and color filter, to enhance pixel isolation and signal processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If device isolation structure is enhanced to improve pixel isolation, then manufacturing complexity increases

Engineering Contradiction:
Improvepixel isolationVSAvoiddevice isolation structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The device isolation structure is divided into multiple functional layers: a first device isolation layer for primary isolation, a second device isolation layer for additional isolation, and a third device isolation layer for fine-tuning isolation characteristics. This segmentation allows each layer to contribute differently to the overall isolation performance, achieving high pixel isolation while maintaining manageable manufacturing complexity through modular construction.

Inventive Principle:
Principle #1Segmentation

2Productivity

If impurity concentration is increased to improve photoelectric conversion, then impurity diffusion increases

Engineering Contradiction:
Improvephotoelectric conversion efficiencyVSAvoidimpurity diffusion
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

A third device isolation layer is introduced as an intermediary barrier between regions with different impurity concentrations. This intermediate layer prevents direct diffusion between high and low impurity regions while allowing each region to maintain its optimal impurity concentration for photoelectric conversion, thus resolving the contradiction between conversion efficiency and diffusion control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Different device isolation layers are positioned at different depths and locations to create localized isolation characteristics. The first device isolation layer provides primary isolation at a deeper level, while the second and third layers provide additional isolation at shallower levels, creating a gradient isolation structure that locally controls impurity diffusion while maintaining high photoelectric conversion efficiency in active regions.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves the uniformity of electrical characteristics, increases the photodiode area, and prevents impurity diffusion, resulting in higher performance and integration density for CMOS image sensors.

Implementation Method 1

An image sensor is a device that converts optical images into electrical signals

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS9679935B2Image sensors
Publication Date: 2017.06.13 SAMSUNG ELECTRONICS CO LTD
  • US9679935B2 patent drawing
  • US9679935B2 patent drawing
  • US9679935B2 patent drawing

AI summary

An image sensor may include a device isolation structure defining a plurality of pixel regions in a substrate and a photoelectric conversion element formed in each of the pixel regions. The device isolation structure may include an insulating gapfill layer extending from an upper portion to a lower portion of the device isolation structure, a spacer provided at the upper portion of the device isolation structure and interposed between the insulating gapfill layer and the substrate, and a lower impurity region provided at the lower portion of the device isolation structure and interposed between the insulating gapfill layer and the substrate.