CMOS Image Sensor Pixel Structure for Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors face challenges in reducing pixel size to achieve higher density while maintaining photodiode size and fill factor, and in minimizing leakage current from highly doped ion implantation regions.
Innovation Solution
The solution involves minimizing the spacing between gate electrodes of transistors in a CMOS image sensor, eliminating the need for highly doped ion implantation regions between the drive and select transistors, and using spacers to fill the gap between these electrodes, which allows for a smaller unit pixel size and increased photodiode size without decreasing the fill factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If highly doped ion implantation regions are formed between gate electrodes to prevent leakage current, then leakage current is reduced, but the spacing between gate electrodes must be increased, which increases unit pixel size
Solution Approach 1:
The patent removes the highly doped ion implantation region between the drive transistor gate and select transistor gate, extracting this component from the structure. This eliminates the need for additional spacing that would be required to accommodate such regions, thereby reducing unit pixel size while managing leakage current through alternative means.
Solution Approach 2:
The patent applies different doping concentrations in different regions: lightly doped regions are used in specific areas between gate electrodes instead of uniformly highly doped regions. This local differentiation allows for reduced spacing while still controlling leakage current through the lighter doping in critical areas.
2Productivity
If the unit pixel size is reduced to increase integration density, then the scale of integration is improved, but the photodiode size must be reduced, which decreases the fill factor
Solution Approach 1:
The patent segments the transistor structure by separating the drive transistor and select transistor into different regions with different doping characteristics. This segmentation allows for optimized space utilization, enabling reduced pixel size while maintaining adequate photodiode area through efficient spatial arrangement of the segmented transistor components.
Solution Approach 2:
The patent changes the doping concentration parameter from highly doped to lightly doped in specific regions between gate electrodes. This parameter change reduces the required spacing between gate electrodes, allowing for more compact transistor arrangements that free up space to maintain larger photodiode areas within the same pixel footprint.
3Reliability
If lightly doped ion implantation regions are used instead of highly doped regions, then leakage current is reduced, but the doping concentration must be optimized to maintain device performance
Solution Approach 1:
The patent changes the doping concentration parameter from high to light doping in the regions between gate electrodes. This parameter change inherently reduces leakage current while the specific doping concentration is optimized to maintain adequate device performance, balancing reliability and manufacturing precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the unit pixel size, increases the photodiode size to enhance the fill factor, and decreases leakage current, thereby improving the scale of integration and device characteristics of the CMOS image sensor.
Implementation Method 1
the photodiode for receiving incident light and generating photocharges
Implementation Method 2
a first ion implantation region formed in a portion of the substrate structure below the spacers filled between the third and fourth gate electrodes; and second ion implantation regions formed in portions of the substrate structure exposed between the spacers
Data Source
AI summary
A complementary metal-oxide semiconductor (CMOS) image sensor includes a photodiode formed in a substrate structure, first to fourth gate electrodes formed over the substrate structure, spacers formed on both sidewalls of the first to fourth gate electrodes and filled between the third and fourth gate electrodes, a first ion implantation region formed in a portion of the substrate structure below the spacers filled between the third and fourth gate electrodes, and second ion implantation regions formed in portions of the substrate structure exposed between the spacers, the second ion implantation regions having a higher concentration than the first ion implantation region.


