CMOS Image Sensor Fabrication Protecting Photodiode From Plasma Damage
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in reducing dark current and resistance variation of middle resistors, which can damage the photodiode region during fabrication, leading to reduced dynamic range and light transmittance issues.
Innovation Solution
A method for fabricating CMOS image sensors that involves forming a gate electrode and polysilicon pattern on the pixel region, creating lightly doped n-type diffusion regions, and using a sequence of insulating layers to protect the photodiode region from plasma damage during sidewall formation, thereby preventing nitride layer remnants that impair light transmittance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional fabrication method is used to form sidewalls on the gate electrode, then the manufacturing process can be completed, but the photodiode region is damaged by plasma and nitride layer remnants impair light transmittance
Solution Approach 1:
An insulating layer is introduced as an intermediary protective barrier between the plasma etching process and the photodiode region. This insulating layer prevents direct plasma contact with the photodiode, eliminating plasma damage while allowing the sidewall formation process to proceed. The insulating layer is selectively removed from non-photodiode regions, providing targeted protection without interfering with other fabrication steps.
Solution Approach 2:
The insulating layer is formed on the photodiode region before the plasma etching process begins. This preliminary protective action ensures that when plasma is subsequently applied to form sidewalls on the gate electrode, the photodiode region is already protected and will not be damaged by the plasma exposure.
2Ease of manufacture
If the nitride layer is not completely removed from the photodiode region, then the fabrication process is simpler, but light transmittance is impaired
Solution Approach 1:
The insulating layer is applied selectively only to the photodiode region, creating local differentiation in the fabrication process. This localized protection allows the photodiode area to be preserved from plasma damage and nitride layer remnants, while other regions undergo the standard fabrication process. The result is that light transmittance is maintained in the photodiode region without requiring complete nitride layer removal across the entire substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the CMOS image sensor's performance by reducing resistance variation and preventing photodiode damage, allowing for improved light transmittance and better image reproduction.
Implementation Method 1
forming a first lightly doped n− type diffusion region on the photodiode region; forming a second lightly doped n-type diffusion region on the transistor region
Implementation Method 2
heavily doping n-type impurities in the transistor region and the polysilicon pattern
Implementation Method 3
forming sidewalls incorporating the first insulating layer and the third insulating layer on the gate electrode and the polysilicon pattern by performing an etch-back process
Data Source
AI summary
A method for fabricating a CMOS image sensor includes: forming a gate electrode on a pixel region of the semiconductor substrate and, at the same time, forming a polysilicon pattern on a middle resistor region; forming a first lightly doped n-type diffusion region on the photodiode region; forming a second lightly doped n-type diffusion region on the transistor region; consecutively forming first and second insulating layers on the entire surface of the semiconductor substrate; removing a predetermined portion of the second insulation layer on the transistor region and the middle resistor region; forming a third insulation layer on the entire surface of the semiconductor substrate; forming sidewalls of the first insulating layer and the third insulating layer on the gate electrode and the polysilicon pattern by performing an etch-back process; and heavily doping n-type impurities in the transistor region and the polysilicon pattern.