CMOS Image Sensor Data Transfer Circuit Test Pattern Generation

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Solution Overview

Problem

In CMOS image sensors with column-parallel analog-to-digital converters, there is a challenge in accurately reading digital values due to variations in parasitic capacitance and resistance in long horizontal transfer lines, making it difficult to determine if non-default digital values are correctly read, and defects in transfer lines and data detecting circuits are hard to detect.

Innovation Solution

A data transfer circuit with test-pattern generating circuits and start-pulse selecting circuits is introduced to test for transfer errors, allowing for the detection of defects in transfer lines and data detecting circuits by generating predetermined digital values and activating test-pattern generating circuits via test-column scanning circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If long horizontal transfer lines are used to transfer digital data from column-parallel ADCs, then the data transfer capability is improved, but transfer errors occur due to variations in parasitic capacitance and resistance

Engineering Contradiction:
Improvedata transfer capabilityVSAvoidtransfer accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A test-pattern generating circuit is introduced as an intermediary component to generate known test patterns that are transferred through the horizontal transfer lines to the data detecting circuit. This intermediary test signal allows verification of transfer accuracy despite the presence of parasitic capacitance and resistance variations in the long transfer lines.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The data detecting circuit detects the transferred test patterns and feeds back the detection results to determine whether transfer errors have occurred. This feedback mechanism enables continuous monitoring and verification of transfer reliability, allowing the system to identify when parasitic effects cause transfer errors.

Inventive Principle:
Principle #23Feedback

2Device complexity

If conventional reading methods are used without test-pattern generating circuits, then the device complexity is reduced, but defects in transfer lines and data detecting circuits are hard to detect

Engineering Contradiction:
Improvecircuit simplicityVSAvoiddefect detection capability
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The data detecting circuit performs self-verification by detecting test patterns that are transferred through the horizontal transfer lines. The circuit uses its own detection capability to verify the integrity of the transfer process, enabling autonomous defect detection without requiring external testing equipment.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Test patterns are generated and transferred before normal imaging operations to preliminarily verify the functionality of the horizontal transfer lines and data detecting circuit. This preliminary action ensures that any defects are detected early, preventing unreliable data transfer during actual imaging.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If digital values are read through long horizontal transfer lines, then the column-parallel ADC functionality is utilized, but it is difficult to determine if non-default digital values are correctly read

Engineering Contradiction:
ImproveADC conversion capabilityVSAvoiddigital value reading accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

Instead of transferring actual image data for verification, the system uses copied test patterns with known predetermined values. These test patterns are generated by the test-pattern generating circuit, transferred through the horizontal lines, and compared against their known values to verify reading accuracy without requiring complex reference data.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8743249B2Solid state imaging device and camera system having test-pattern generating circuitry
Publication Date: 2014.06.03 SONY SEMICON SOLUTIONS CORP
  • US8743249B2 patent drawing
  • US8743249B2 patent drawing
  • US8743249B2 patent drawing

AI summary

A data transfer circuit includes at least one data transfer line that transfers digital data, at least one data detecting circuit connected to the transfer line, holding circuits that hold digital values corresponding to input levels and that transfer the digital values to the transfer line, a scanning circuit that selects a holding circuit, at least one test-pattern generating circuit that generates a digital value, the test-pattern generating circuit connected to the transfer line, at least one test-column scanning circuit that selects the test-pattern generating circuit, and a start-pulse selecting circuit that controls starting of the scanning circuit and the test-column scanning circuit. The start-pulse selecting circuit transfers a digital value to the data transfer line by activating the test-pattern generating circuit.