CMOS Solid-State Imaging Device Pixel Isolation Structure
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Solution Overview
Problem
Conventional CMOS solid-state imaging devices using STI element isolation methods face challenges such as thermal stress-induced pixel defects, reduced saturation signal amount due to narrowed photodiode regions, and difficulty in forming a p+ semiconductor region for dark current and white spot suppression, leading to image deterioration and manufacturing difficulties.
Innovation Solution
The use of a diffusion layer and an insulating layer for element isolation, with the diffusion layer being shallower than the silicon oxide film in STI regions, allows for larger sensor regions and reduced dark current, enabling increased saturation signal without enlarging white spots or dark current, and facilitates reliable isolation between photodiodes and transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If STI element isolation method is used, then element isolation between pixels is achieved, but thermal stress induces pixel defects and photodiode regions are narrowed reducing saturation signal amount
Solution Approach 1:
The element isolation structure is segmented into multiple functional layers: a first element isolation layer (diffusion layer) for electrical isolation and a second element isolation layer (insulating layer) for mechanical stress relief. This segmentation allows each layer to perform its specific function independently, preventing thermal stress from reaching the photodiode while maintaining effective isolation.
Solution Approach 2:
The insulating layer acts as an intermediary between the diffusion layer and the photodiode region. It mechanically decouples the stress-generating diffusion layer from the sensitive photodiode, allowing the diffusion layer to provide electrical isolation without transmitting thermal stress to the photodiode, thus preserving both isolation effectiveness and photodiode integrity.
2Ease of manufacture
If diffusion layer is used for element isolation, then manufacturing process is simplified, but electrical isolation effectiveness may be reduced compared to STI
Solution Approach 1:
The invention merges two isolation mechanisms into a single integrated structure: the diffusion layer provides junction-based electrical isolation while the insulating layer provides surface-based isolation. This combination achieves superior electrical isolation effectiveness compared to either method alone, while maintaining the manufacturing simplicity of diffusion-based approaches.
Solution Approach 2:
The element isolation structure uses composite materials approach by combining doped semiconductor material (diffusion layer) with insulating material (oxide or nitride layer). This composite structure leverages the electrical isolation properties of the doped region and the surface passivation properties of the insulator, achieving reliable isolation with simplified processing.
3Reliability
If STI region is formed deeply to improve isolation, then isolation effectiveness increases, but p+ semiconductor region formation becomes difficult and manufacturing complexity increases
Solution Approach 1:
Instead of forming a deep trench and then attempting to fill it with p+ semiconductor material (which is difficult), the invention inverts the approach: it forms a shallow diffusion layer first, then covers it with an insulating layer. This reversed sequence achieves effective isolation while avoiding the manufacturing difficulties of deep trench filling.
Solution Approach 2:
The diffusion layer is formed preliminarily before the insulating layer is deposited. This preliminary action establishes the electrical isolation foundation early in the process, and subsequent insulator deposition automatically provides the mechanical stress relief without requiring complex additional steps to reach deep trench bottoms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the saturation signal amount while minimizing dark current and white spots, allowing for larger sensor regions and improved image quality in miniaturized pixels, and simplifies the manufacturing process by using a diffusion layer for element isolation.
Implementation Method 1
element isolation within a pixel and element isolation between pixels next to each other are executed by a diffusion layer
Implementation Method 2
element isolation portion which includes a diffusion layer and an insulating layer formed on the diffusion layer
Data Source
AI summary
A CMOS solid-state imaging device configured to restrain the occurrence of white spots and dark current caused by pixel defects, and also to increase the saturation signal amount. Adjacent pixels are separated by an element isolation portion formed of a diffusion layer and an insulating layer thereon, and the insulating layer of the element isolation portion is formed in a position equal to or shallower than the position of a pn junction on the side of an accumulation layer of a photoelectric conversion portion 38 constituting a pixel.