CMOS Inverter Back-Gate Biasing for Wider Transconductance Range
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Solution Overview
Problem
The transconductance range of CMOS inverters is limited by the supply voltage, restricting their performance across temperature and supply voltage variations.
Innovation Solution
A system and method that includes a biasing circuit and a control circuit to provide a supply voltage and bias voltage to the CMOS inverter, with transistors interconnected via back gates, allowing control of transconductance beyond the supply voltage limits by applying a bias voltage to the back gates when the supply voltage reaches a threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the supply voltage of the CMOS inverter is increased to extend the transconductance range, then the transconductance range is improved, but the power consumption and device stress increase
Solution Approach 1:
The patent applies parameter changes by utilizing the back gate voltage to modify the threshold voltage of the transistors. By changing the threshold voltage parameter through back gate control, the transconductance range is extended without requiring proportional increases in supply voltage, thus avoiding increased power consumption. The back gate voltage serves as an additional control parameter that decouples transconductance adjustment from supply voltage scaling.
Solution Approach 2:
The back gate voltage acts as an intermediary mechanism between the supply voltage and the transconductance. Instead of directly increasing supply voltage to extend transconductance range, the back gate voltage mediates this relationship by providing indirect control through threshold voltage modulation. This intermediary approach allows transconductance adjustment without the linear power consumption penalty associated with direct supply voltage increases.
2Reliability
If the supply voltage is increased to maintain transconductance over temperature variations, then the transconductance stability is improved, but the device reliability and lifetime deteriorate due to increased stress
Solution Approach 1:
The patent compensates for temperature-induced transconductance variations by dynamically adjusting the back gate voltage to counteract threshold voltage drift. This parameter change approach maintains stable transconductance across temperature ranges without requiring proportional increases in supply voltage, thereby avoiding the accelerated aging and stress-related reliability degradation that would result from higher operating voltages.
3Measurement precision
If a static complementary constant-transconductance biasing circuit is used, then the transconductance control accuracy is improved, but the transconductance range is limited by the supply voltage
Solution Approach 1:
The patent transforms the static biasing approach into a dynamic system by introducing back gate voltage control that can be adjusted independently of the supply voltage. This dynamic control mechanism extends the transconductance range beyond what is possible with static supply voltage alone, while maintaining control accuracy through the additional degree of freedom provided by the back gate terminals.
Solution Approach 2:
The patent adds another dimension to the control space by utilizing the back gate terminals. Instead of relying solely on the single dimension of supply voltage adjustment, the back gate voltage provides an additional control dimension that enables extended transconductance range while preserving the precision benefits of complementary constant-transconductance biasing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The transconductance range of the CMOS inverter is extended, enabling consistent performance across varying temperatures and supply voltages, with maximum transconductance maintained even with voltage and temperature variations.
Implementation Method 1
the transistor arrangement and the CMOS inverter are interconnected via back gates of respective transistors
Data Source
AI summary
A system is provided for increasing the transconductance of a CMOS inverter. The system comprises a biasing circuit configured to provide a supply voltage to the CMOS inverter, wherein the biasing circuit comprises at least one transistor arrangement, wherein the transistor arrangement and the CMOS inverter are interconnected via back gates of respective transistors. The system further comprises a control circuit configured to provide a bias voltage to the interconnected back gates when the supply voltage reaches a threshold value, whereby both the biasing circuit and the control circuit together control the transconductance of the CMOS inverter.