CMOS Inverter Biasing Circuit with Self-Regulating Transconductance
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Solution Overview
Problem
Existing biasing circuits for inverter-based circuits face challenges in maintaining constant transconductance over temperature and processing variations, often requiring additional control loops and complex circuitry.
Innovation Solution
A biasing circuit comprising two shorted inverter circuits with different transistor geometries connected in parallel with a reference impedance, and a control circuit ensuring equal current flow, eliminates temperature dependency and reduces the need for additional control loops by generating a supply voltage that keeps transconductance constant.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If additional control loops are used to maintain constant transconductance, then transconductance stability over temperature and processing variations is improved, but device complexity increases
Solution Approach 1:
The biasing circuit automatically adjusts the supply voltage to maintain constant transconductance without external control loops. The circuit uses intrinsic transistor geometry ratios and automatic voltage adjustment mechanisms to self-regulate the bias conditions, eliminating the need for additional control circuitry while maintaining stability over temperature and processing variations.
Solution Approach 2:
The invention changes the supply voltage parameter dynamically to compensate for temperature and processing variations. By adjusting the supply voltage based on the fixed transistor geometry ratios, the circuit maintains constant transconductance without requiring complex control loops, thus resolving the contradiction between stability and complexity.
2Stability of the object's composition
If complex biasing circuits with control loops are implemented, then transconductance constancy is improved, but ease of manufacture and integration deteriorates
Solution Approach 1:
The biasing circuit is designed to self-adjust using intrinsic circuit properties rather than requiring external control mechanisms. The automatic voltage adjustment and current balancing are achieved through the circuit's own structure, making it easy to manufacture and integrate into existing CMOS processes without additional complex components.
Solution Approach 2:
The biasing circuit uses standard CMOS transistors and components that can be universally integrated into existing manufacturing processes. By using common transistor geometries and standard circuit blocks, the invention achieves transconductance constancy while maintaining ease of manufacture and integration into conventional CMOS technologies.
3Temperature
If temperature compensation mechanisms are added, then temperature dependency is reduced, but device complexity increases
Solution Approach 1:
The circuit compensates for temperature effects by dynamically adjusting the supply voltage parameter. The automatic voltage regulation mechanism changes the operating point to maintain constant transconductance across temperature ranges, achieving temperature compensation without adding complex dedicated compensation circuits.
Solution Approach 2:
The biasing circuit incorporates implicit feedback mechanisms where the supply voltage adjustment automatically responds to temperature and processing variations. The control circuit monitors the bias conditions and adjusts the supply voltage to maintain constant transconductance, providing temperature compensation through feedback without requiring complex external control loops.
Data Source
AI summary
Biasing circuit for providing a supply voltage (Vdd) for an inverter based circuit. The biasing circuit is provided on a same die as the inverter based circuit, and includes a first shorted inverter circuit (T1, T2) and a second shorted inverter circuit (T3, T4). The first shorted inverter circuit (T1, T2) is connected in parallel to a series configuration of the second shorted inverter circuit (T3, T4) and a reference impedance (R). The first shorted inverter circuit (T1, T2) and second shorted inverter circuit (T3, T4) have different transistor geometries. A control circuit (T5-T11) is connected to the first shorted inverter circuit (T1, T2) and the second shorted inverter circuit (T3, T4), and supplied with a main supply voltage (Vdd). The control circuit (T5-T11) is arranged such that an equal current flows through the first shorted inverter circuit (T1, T2) and second shorted inverter circuit (T3, T4).