CMOS Inverter Sensing Circuit for Nonvolatile Memory Read Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Nonvolatile memory devices using P-channel transistors face instability in read operations due to limited operation range caused by varying supply voltages, leading to abnormal read operations and reduced margins for both initial and programmed cell transistors.
Innovation Solution
A nonvolatile memory device design incorporating a sensing circuit with a CMOS inverter structure, utilizing both N-channel and P-channel transistors, where the gate of the P-channel transistor is coupled to the ground voltage, and a resistive load element, allowing for stable read operations across a wider supply voltage range by adjusting enablement signals and transistor thresholds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If P-channel transistors are used as cell transistors in nonvolatile memory devices, then the devices can be programmed and read, but the read operation becomes unstable when supply voltage varies, limiting the operation range
Solution Approach 1:
The sensing circuit dynamically adapts to varying supply voltages by using a CMOS inverter structure where the P-channel transistor gate is coupled to ground voltage. This dynamic configuration allows the sensing circuit to maintain stable operation across a wide range of supply voltages, resolving the contradiction between read operation stability and operation range adaptability.
Solution Approach 2:
The invention changes the operating parameters of the sensing circuit by coupling the P-channel transistor gate to ground voltage instead of supply voltage. This parameter change enables the sensing circuit to maintain proper voltage levels for reliable read operations regardless of supply voltage variations, thus improving reliability while expanding the operational voltage range.
2Adaptability or versatility
If the supply voltage is increased to expand the operation range, then more voltage levels are available for diverse electronic systems, but the read margin for both initial and programmed cell transistors is reduced
Solution Approach 1:
The sensing circuit acts as an intermediary between the cell transistor and the read operation. By using the CMOS inverter structure with the P-channel transistor gate coupled to ground, the sensing circuit mediates the voltage levels and ensures sufficient read margin is maintained even when supply voltage varies, thus allowing expanded operation range without sacrificing measurement precision.
Solution Approach 2:
The invention changes the voltage reference parameter for the P-channel transistor gate from supply voltage to ground voltage. This parameter change ensures that the voltage differential used for sensing remains stable and sufficient across different supply voltage levels, maintaining read margin while enabling broader supply voltage operation.
3Use of energy by moving object
If the supply voltage is decreased to improve integration and reduce power consumption, then energy efficiency increases, but the read operation becomes abnormal and unstable
Solution Approach 1:
The sensing circuit is designed to dynamically adapt to low supply voltage conditions through its CMOS inverter structure. By coupling the P-channel transistor gate to ground voltage, the circuit maintains proper voltage levels and signal integrity even at reduced supply voltages, enabling low-power operation without compromising read operation stability.
Solution Approach 2:
The invention changes the reference voltage parameter for the P-channel transistor to ground voltage, which allows the sensing circuit to maintain adequate voltage margins for stable read operations at lower supply voltages. This parameter change enables the circuit to operate reliably across a wider voltage range including lower voltages that reduce power consumption.
Data Source
AI summary
A nonvolatile memory device may include a nonvolatile memory cell and a sensing circuit. The sensing circuit is coupled to a bit line of the nonvolatile memory cell. The sensing circuit may be realized using an inverter comprised of a P-channel transistor coupled to a supply voltage line and an N-channel transistor coupled to a ground voltage. The gate of the P-channel transistor is coupled to the ground voltage.


