CMOS Level Converter Circuit for Large Voltage Gaps

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Solution Overview

Problem

Existing level converter circuits face challenges in maintaining stable operation and low power consumption when the difference between power supply voltages across circuit blocks is large, due to imbalanced currents through nMOS and pMOS transistors, especially under varying voltage conditions and temperature changes.

Innovation Solution

A level converter circuit design incorporating an amplifier, current generator circuit, and current detector circuit, with nMOS transistors connected in series and parallel to enhance control current, and a control circuit to adjust substrate potential, ensuring stable operation and low power consumption by generating control current only when the signal level changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing latch-based level converter circuits are used, then signal level conversion can be achieved, but the driving power of transistors becomes extremely small when the difference between power supply voltages is relatively large, resulting in unstable operation

Engineering Contradiction:

Improvestable level conversion operationVSAvoiddriving power of transistors

Core Design Contradiction:

ReliabilityVSPower

Solution Approach 1:

The patent changes the operational parameters of the circuit by introducing a current generator that dynamically adjusts the operating current based on the input signal level. When converting from low voltage to high voltage, the current generator increases the operating current to compensate for the reduced transistor driving power, ensuring stable operation across different voltage domains.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces a current generator circuit as an intermediary component between the input signal and the level conversion stage. This intermediary actively monitors the voltage difference and adjusts the operating current accordingly, mediating the transition between different voltage domains to maintain stable operation.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Use of energy by moving object

If power supply voltage is reduced to lower power consumption, then energy efficiency improves, but the difference voltage between circuit blocks increases, making stable level conversion more difficult

Engineering Contradiction:

Improvepower consumptionVSAvoidstable level conversion operation

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent makes the operating current dynamic rather than fixed. The current generator continuously adjusts the operating current based on the actual voltage difference between circuit blocks, allowing the system to adapt to varying power supply conditions and maintain stable operation even when large voltage differences exist due to reduced power consumption.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements a feedback mechanism where the current generator monitors the operating conditions and adjusts the current accordingly. This feedback loop ensures that the operating current is optimized for the actual voltage difference, maintaining reliable level conversion while allowing power supply voltages to be reduced for lower power consumption.

Inventive Principle:

Principle #23Feedback

3Adaptability or versatility

If nMOS and pMOS transistors are used in latch structure, then level conversion can be performed, but current imbalance occurs under varying voltage conditions and temperature changes

Engineering Contradiction:

Improveoperation under varying conditionsVSAvoidcurrent balance between transistors

Core Design Contradiction:

Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent implements a self-adjusting mechanism where the current generator automatically compensates for current imbalance between nMOS and pMOS transistors. The system monitors the operating conditions and self-corrects the current distribution, eliminating the need for external calibration and maintaining stability under varying temperature and voltage conditions.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS8436654B2Level converter circuit for use in CMOS circuit device provided for converting signal level of digital signal to higher level

Publication Date: 2013.05.07 SONY GROUP CORP

AI summary

A level converter circuit is provided for converting an input signal of a digital signal having a first signal level into an output signal having a second signal level higher than the first signal level. An amplifier circuit amplifies the input signal and outputs an amplified output signal, and a current generator circuit generates a control current corresponding to an operating current flowing through the amplifier circuit upon change of the signal level of the input signal. A current detector circuit detects the generated control current, and controls the operating current of the amplifier circuit to correspond to the detected control current. The current generator circuit includes series-connected first and second nMOS transistors as inserted between the current detector circuit and the ground. The first nMOS transistor operates responsive to the input signal, and the second nMOS transistor operates responsive to an inverted signal of the input signal.