CMOS Line Sensor Signal Routing and Parallel Readout
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Solution Overview
Problem
Existing AF sensors using CCDs face challenges in maintaining noise immunity and simultaneity of pixel signals, leading to decreased precision and increased complexity, particularly when handling high-speed moving subjects.
Innovation Solution
A solid state imaging apparatus with CMOS image sensors, where multiple line sensors are discretely arranged and connected via signal lines that are wired closely together, utilizing a parallel A/D converter and switches to enable parallel signal processing and reduce noise immunity issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If signal lines are read out separately for each line sensor, then noise immunity is maintained, but processing speed decreases and chip size increases
Solution Approach 1:
Multiple signal lines from different line sensors are gathered and wired along a common region, merging previously separate routing paths into a shared infrastructure. This reduces the total wiring area on the chip while enabling parallel signal readout, thus increasing processing speed without proportionally increasing chip size.
Solution Approach 2:
The patent transitions from sequential one-dimensional signal reading to parallel multi-dimensional signal processing by gathering signal lines from multiple line sensors into a common wiring region, allowing simultaneous readout of multiple pixel signals across different spatial dimensions.
2Area of stationary object
If multiple line sensors are arranged closely, then chip size is reduced, but signal line interference increases
Solution Approach 1:
A ground line is introduced as an intermediary element between adjacent signal lines in the gathered wiring region. This ground line acts as a shield that reduces electromagnetic interference between signal lines, enabling close arrangement of multiple line sensors without significant signal degradation.
3Area of stationary object
If signal lines are gathered and wired closely, then wiring area is reduced, but noise immunity deteriorates
Solution Approach 1:
Ground lines are positioned between adjacent signal lines in the gathered wiring region, serving as intermediary shielding elements. These ground lines reduce capacitive coupling and electromagnetic interference between signal lines, maintaining noise immunity even when signal lines are closely spaced to minimize wiring area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for simultaneous and high-precision reading of pixel signals, improving noise immunity and processing speed, while reducing power consumption and chip size, enabling better tracking of fast-moving subjects.
Implementation Method 1
each of the pixels including an amplifier which amplifies a signal corresponding to a charge accumulated in a photoelectric transducer
Data Source
AI summary
There is provided a solid state imaging apparatus, including a plurality of line sensors including a plurality of pixels arrayed in a line, each of the pixels including an amplifier which amplifies a signal corresponding to a charge accumulated in a photoelectric transducer, and signal lines each for reading a signal of each pixel of the line sensors. The plurality of line sensors are discretely arranged, and the signal lines are gathered and wired along a region in which a circuit block including the line sensors is arranged.