CMOS Gate Insulating Film Nitrogen Gradient
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Solution Overview
Problem
High nitrogen concentration in gate insulating films of CMOS transistors leads to shortened NBTI lifetime in pMOS transistors and enhanced boron penetration, affecting transistor performance, while fluorine introduction in nMOS transistors deteriorates their performance by increasing boron penetration and altering threshold voltage.
Innovation Solution
A manufacturing method for CMOS semiconductor devices involves introducing halogen into the pMOS transistor area, forming a gate insulating film, and then incorporating nitrogen, which stabilizes the interface and suppresses boron penetration, improving NBTI lifetime without degrading nMOS transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If nitrogen concentration in gate insulating film is increased to suppress gate leakage current, then gate leakage current is reduced, but NBTI lifetime becomes short and boron penetration is enhanced
Solution Approach 1:
The patent applies local quality by creating a nitrogen concentration gradient within the gate insulating film. The nitrogen concentration is higher near the semiconductor substrate interface to suppress gate leakage current, while being lower near the gate electrode interface to prevent boron penetration and maintain NBTI lifetime. This spatial variation in nitrogen concentration allows simultaneous optimization of both parameters.
Solution Approach 2:
The patent changes the nitrogen concentration parameter across different regions of the gate insulating film. By controlling the nitrogen introduction process to create a gradient distribution rather than uniform concentration, the film achieves different local properties: high nitrogen content at the substrate interface for leakage suppression, and low nitrogen content at the electrode interface for reliability maintenance.
2Object-affected harmful factors
If fluorine is introduced into gate insulating film to suppress boron penetration, then boron penetration is reduced, but nMOS transistor performance deteriorates due to enhanced boron penetration and threshold voltage change
Solution Approach 1:
The patent extracts fluorine from the gate insulating film structure by replacing it with a nitrogen-dominated gradient profile. Instead of using fluorine ion implantation to suppress boron penetration, the invention relies on the nitrogen concentration gradient combined with a boron-free gate electrode, thereby avoiding the harmful effects of fluorine on nMOS transistor performance while still preventing boron diffusion.
Solution Approach 2:
The patent introduces a nitrogen-rich intermediate layer at the substrate interface as a mediator to suppress boron penetration. This nitrogen-rich region acts as a diffusion barrier without requiring fluorine, thereby protecting the nMOS transistor performance while still achieving boron penetration suppression through the gradient structure.
3Manufacturing precision
If boron is incorporated into gate electrode to adjust threshold voltage, then threshold voltage control is improved, but boron penetration to semiconductor substrate is enhanced when fluorine is present
Solution Approach 1:
The patent converts the potential harm of boron penetration into a benefit by using boron-doped polysilicon as the gate electrode material. The boron doping in the gate electrode provides precise threshold voltage control, while the nitrogen concentration gradient in the gate insulating film acts as a protective barrier that prevents this boron from penetrating into the semiconductor substrate, thereby eliminating the harmful effect while retaining the beneficial electrical control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively improves NBTI lifetime and drain current in pMOS transistors while maintaining nMOS transistor performance by stabilizing the semiconductor substrate and gate insulating film interface, reducing boron penetration, and optimizing fluorine distribution.
Implementation Method 1
introducing nitrogen to the first gate insulating film
Implementation Method 2
introducing halogen to the semiconductor substrate of all or partial areas of the pMOS transistor formation area
Implementation Method 3
incorporating boron into the first gate electrode
Data Source
AI summary
The manufacturing method of the CMOS type semiconductor device which can suppress the boron penetration from the gate electrode of the pMOS transistors to the semiconductor substrate in the case that boron is contained in the gate electrodes, while enabling the improvement in the NBTI lifetime of the pMOS transistors, without degrading the performance of the nMOS transistors, is offered. The manufacturing method of the CMOS type semiconductor device concerning the present invention has the following process steps. Halogen is introduced to the semiconductor substrate of pMOS transistor formation areas. Next, a gate insulating film is formed on the semiconductor substrate of the pMOS transistor formation areas. Next, nitrogen is introduced to the gate insulating film.