CMOS Power Amplifier Bias Feedback for RF Linearity Stability
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Solution Overview
Problem
Existing CMOS power amplifiers face challenges in maintaining linear operation across various temperature, process, and supply voltage corners due to unbalanced transconductances of NFETs and PFETs, leading to distortions at different signal levels.
Innovation Solution
Implementing multi-path common-mode feedback loops that dynamically adjust bias voltages and supply signals to maintain a fixed output common-mode at half-supply level, balancing transconductances and using bypass switches to prevent cascoded amplifier collapse, along with a fast feed-forward path to correct supply asymmetry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional CMOS power amplifiers are used without feedback loops, then the device complexity is low, but the linearity and performance consistency across temperature, process, and supply voltage variations deteriorates
Solution Approach 1:
The patent implements a common-mode feedback loop that senses the common-mode voltage at the output and dynamically adjusts the bias voltages to maintain the output common-mode at half-supply level. This feedback mechanism compensates for variations in temperature, process, and supply voltage, ensuring consistent linearity performance across different operating conditions.
Solution Approach 2:
The bias voltages are made dynamically adjustable through the feedback loop, allowing the amplifier to adapt its operating point in real-time based on the sensed output common-mode voltage. This dynamic adjustment compensates for environmental variations and maintains optimal performance without requiring complex static design adjustments.
2Reliability
If the supply circuit bandwidth is increased to handle high-frequency RF signal modulation, then the signal fidelity improves, but the device complexity and power consumption increase
Solution Approach 1:
The supply current is segmented into two components: a DC component handled by the conventional supply circuit and an AC envelope component extracted and handled separately. This segmentation allows the main supply circuit to operate at lower bandwidth while a dedicated path handles the high-frequency variations, reducing overall system complexity.
Solution Approach 2:
The AC envelope component is extracted from the total supply current using a supply current sensing circuit. By separating and independently handling the AC component, the system achieves high-frequency signal fidelity without requiring the entire supply circuit to operate at high bandwidth, thus reducing complexity and power consumption.
3Reliability
If asymmetric dynamic feedback is applied to balance transconductances, then the distortion is reduced, but the device complexity increases
Solution Approach 1:
The patent employs asymmetric dynamic feedback where different feedback paths are provided to the NFET and PFET gates. This asymmetric configuration is specifically designed to balance the inherently different transconductances of n-type and p-type FETs, reducing distortion by compensating for their asymmetric characteristics rather than treating them symmetrically.
4Reliability
If multi-path feedback loops are implemented for common-mode control, then the linearity over process and temperature corners is improved, but the manufacturing complexity increases
Solution Approach 1:
The common-mode feedback loop serves multiple functions simultaneously: it maintains the output common-mode voltage, balances the transconductances of NFET and PFET, and compensates for variations across temperature and process corners. This multi-functionality reduces the need for separate compensation circuits, thereby easing manufacturing despite the sophisticated control achieved.
Data Source
AI summary
A power amplifier using multi-path common-mode feedback loops for radio frequency linearization is disclosed. In one aspect, a complementary metal oxide semiconductor (CMOS) power amplifier containing cascoded n-type field effect transistors (NFETs) and cascoded p-type FETs (PFETs) may have a common-mode feedback network and provides bias voltages that are dynamically varying with the signal power to keep the output common-mode fixed around a half-supply level, while the small-signal and large-signal transconductances of the FET's are kept balanced. A further feedback network may be associated with the supply voltage to assist in providing a symmetrical supply signal. The symmetrical supply signal allows for supply variations without introducing distortion for the power amplifier stage.


