CMOS-Compatible On-Chip Peltier Cooling Using Doped Polysilicon
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Solution Overview
Problem
Existing on-chip Peltier cooling devices based on metal Peltier effect have weak cooling effects and are incompatible with semiconductor CMOS processes, necessitating a more effective and compatible cooling solution.
Innovation Solution
The development of an on-chip Peltier cooling device comprising a semiconductor substrate with specific doped regions and polysilicon gates, along with tri-state control gates, which allows for improved heat dissipation through controlled current flow, enabling both cooling and heating modes compatible with existing CMOS processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If metal Peltier effect is used for on-chip cooling, then cooling function is provided, but cooling effect is weak and compatibility with CMOS processes is poor
Solution Approach 1:
The patent changes the material parameter from metal to semiconductor polysilicon, and changes the physical mechanism from metal Peltier effect to semiconductor Peltier effect, achieving both CMOS compatibility and enhanced cooling effect
Solution Approach 2:
The patent uses composite structure with n-type and p-type doped polysilicon regions combined with gate oxide layers to create an integrated cooling device that is compatible with CMOS fabrication processes
2Temperature
If additional cooling mode is added to chips, then cooling function is provided, but device complexity increases and application convenience decreases
Solution Approach 1:
The patent integrates cooling function into the existing transistor structure, allowing the same device structure to serve both as a transistor and a Peltier cooling device, eliminating the need for separate cooling components
Solution Approach 2:
The patent merges the cooling function with the transistor structure by integrating doped polysilicon regions and gate oxide layers into the existing CMOS fabrication process, creating a unified device that performs both computation and thermal management
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides enhanced cooling efficiency with reduced power consumption, achieving significant temperature differences across the chip surface while being fully compatible with existing CMOS processes, thus addressing the limitations of previous designs.
Implementation Method 1
when current flows through a loop composed of different conductors... heat absorption and heat release
Implementation Method 2
Peltier effect refers to a phenomenon of heat absorption and heat release at joints of different conductors when current flows through a loop composed of different conductors
Data Source
AI summary
On-chip peltier cooling devices and manufacturing methods thereof are provided. The device comprises: a first type well, a polysilicon gate and dummy gates, first type doped regions, a second type doped region, a first and second via. The dummy gate is formed as a two-segment structure with an interval, and there is no gate oxide layer between portions of the dummy gate which are far away from the interval and the semiconductor substrate. The first type doped region at least overlaps with an orthographic projection region of the first segment of the dummy gate on the semiconductor substrate. The second type doped region at least overlaps with orthographic projection regions of the polysilicon gate and the second segment of the dummy gate on the semiconductor substrate. In this application, the heat flows from inside of the device to its surface, to realize heat dissipation and cooling.