Indented CMOS Photodiode Structure for Scaled Pixel Charge Capacity
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Solution Overview
Problem
CMOS image sensors face limitations in full well capacity due to the difficulty in controlling photodiode profiles with high ion-implant dosage, which affects picture quality and dynamic range, especially as device scaling reduces pixel dimensions and increases thermal budget constraints.
Innovation Solution
The introduction of a CMOS image sensor with a photodiode structure featuring an indented p-n junction interface, including recessed portions symmetrically distributed along the gate electrode and floating diffusion region, increases the area of the p-n junction interface, thereby enhancing the full well capacity by increasing electron-hole pairs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high ion-implant dosage is used to increase full well capacity, then the full well capacity increases, but the photodiode profile control becomes difficult and picture quality deteriorates
Solution Approach 1:
The patent introduces a recessed structure that extends vertically into the substrate, adding a depth dimension to the photodiode active region. This vertical extension increases the volume for charge collection without requiring increased lateral dimensions or higher ion-implant dosage, thereby maintaining profile control while improving full well capacity.
Solution Approach 2:
The recessed structure creates a nested configuration where the photodiode active region is embedded within the substrate. This nested design allows the photodiode to occupy additional vertical space within the existing pixel footprint, increasing charge storage capacity without expanding the overall device footprint or compromising manufacturing precision.
2Productivity
If device scaling is performed to reduce pixel dimensions, then integration density increases, but thermal budget constraints worsen and full well capacity decreases
Solution Approach 1:
The recessed structure exploits the vertical dimension to increase photodiode volume within scaled-down lateral dimensions. By extending the photodiode depth into the substrate, the design maintains adequate charge collection volume despite reduced pixel pitch, thereby preserving full well capacity while achieving high integration density without excessive thermal budget consumption.
3Quantity of substance
If photodiode area is increased to improve full well capacity, then electron-hole pair generation increases, but pixel area increases and integration density decreases
Solution Approach 1:
The invention transitions from lateral area expansion to vertical depth extension by creating a recessed photodiode structure. This allows the photodiode to achieve increased volume and full well capacity by utilizing the third dimension (depth) rather than expanding the two-dimensional pixel footprint, thereby maintaining high integration density while improving charge storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the full well capacity of the CMOS image sensor, leading to better performance and picture quality by effectively managing thermal budgets and ion-implantation challenges, while maintaining high integration density and performance.
Implementation Method 1
The photo detecting column and the substrate are in contact with each other at a junction interface and are configured as a photodiode structure to convert radiation that enters the substrate into an electrical signal
Data Source
AI summary
The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a substrate and a transfer gate disposed from a front-side surface of the substrate. The CMOS image sensor further comprises a photo detecting column disposed at one side of the transfer gate within the substrate. The photo detecting column comprises a doped sensing layer comprising one or more recessed portions along a circumference of the doped sensing layer in parallel to the front-side surface of the substrate. By forming the photo detecting column with recessed portions, a junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.