CMOS-Photonics Co-Design Using Shared Optical Parameters

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Solution Overview

Problem

The design and fabrication of CMOS-photonics devices are inefficient and laborious due to the separate development of the CMOS and photonics portions, leading to potential operational failures and lengthy development times.

Innovation Solution

Integrating the design and fabrication processes of CMOS and photonics foundries through communication and data sharing, using optical design parameters to create accurate SPICE-compatible models for CMOS circuit design, and iterative simulations to ensure specifications are met, thereby synchronizing the development of CMOS and photonics components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CMOS and photonics portions are developed separately using independent design processes, then each portion can be optimized independently, but the overall device may not operate as expected and requires multiple redesign cycles

Engineering Contradiction:
Improvedevice operation reliabilityVSAvoiddesign and fabrication time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the separate CMOS and photonics design processes into a unified co-design framework. The shared database allows both design teams to access and update common parameters simultaneously, enabling integrated optimization rather than independent design followed by integration. This resolving the contradiction by making the design process collaborative from the start, ensuring device reliability while reducing iterative redesign cycles.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements continuous feedback loops where simulation results, fabrication data, and performance measurements are automatically fed back into the shared database. This allows real-time adjustments to design parameters based on actual device behavior, improving reliability through iterative refinement while reducing the time needed for multiple redesign cycles by identifying issues early in the design phase.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If back of the envelope calculations are used to estimate optical design parameters, then the design process is simpler and faster, but the estimates are inaccurate and lead to operational failures

Engineering Contradiction:
Improveparameter estimation accuracyVSAvoiddesign process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary accurate calculations and simulations of optical design parameters before the CMOS design phase begins. By pre-computing accurate S-parameters, loss values, and other critical parameters using rigorous electromagnetic simulations, the system eliminates the need for back-of-the-envelope estimates. This preliminary action ensures high measurement precision while managing complexity through automated computational tools and structured workflows.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary layer of accurate computational models and simulation tools that bridge the gap between simple estimation and complex analysis. These intermediary models provide sufficiently accurate predictions of optical behavior without requiring full-blown electromagnetic simulations for every design iteration, thus improving parameter accuracy while keeping the design process manageable through hierarchical modeling approaches.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If independent redesign of CMOS and photonics portions is performed multiple times, then each portion can be optimized, but the overall process becomes inefficient and laborious

Engineering Contradiction:
Improvedesign optimization qualityVSAvoiddesign productivity
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent combines the independent optimization processes into a coordinated co-design workflow where CMOS and photonics designs are developed concurrently with continuous interaction. The shared database enables both teams to see the impact of their design choices on the other subsystem in real-time, allowing simultaneous optimization rather than sequential independent redesign. This merging maintains high manufacturing precision through continuous cross-validation while dramatically improving design productivity by eliminating redundant iteration cycles.

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If accurate optical design parameters are used in CMOS design, then the CMOS-photonics device operates optimally, but the design and fabrication process becomes more complex and time-consuming

Engineering Contradiction:
Improvedevice operation performanceVSAvoiddesign and fabrication time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary accurate characterization of optical components and pre-computation of S-parameters, loss values, and other critical parameters before the CMOS design phase. By preparing accurate optical models in advance and storing them in the shared database, the system enables CMOS designers to work with pre-validated optical parameters without performing time-consuming simulations during the CMOS design iterations. This preliminary action ensures optimal device performance while reducing the overall design and fabrication time through efficient workflow sequencing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10503851B2CMOS-photonics co-design
Publication Date: 2019.12.10 HEWLETT PACKARD ENTERPRISE DEV LP
  • US10503851B2 patent drawing
  • US10503851B2 patent drawing
  • US10503851B2 patent drawing

AI summary

In example implementations, a method executed by a processor is provided. The method receives a simulated photonic data input based on a theoretical photonic design that meets a target specification. A complementary metal-oxide semiconductor (CMOS) circuit design is designed based on the simulated photonic data input using a pre-layout simulation. An experimental photonic data input based on a fabricated photonics device that meets the target specification is received. The CMOS circuit is designed based on the experimental photonic data input using a post-layout simulation. A physical circuit CMOS circuit design and a layout that includes detailed physical dimensions associated with the physical CMOS circuit design that is based on the pre-layout and the post-layout are transmitted to a CMOS foundry.