CMOS Image Sensor Pixel Bank Segmentation for Readout Speed
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors face challenges with increased pixel count due to parasitic resistances and capacitances in vertical signal lines, leading to focal plane phenomena and reduced pixel readout speed, which are difficult to correct and result in image distortion.
Innovation Solution
The image pickup element is designed with a pixel unit divided into two regions, each connected to separate read signal lines, allowing for sequential driving of pixel circuits in rows, reducing parasitic resistances and capacitances, and incorporating a processing unit to handle read signals from these divided groups.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the number of pixels is increased and light-receiving area is increased, then image quality is improved, but parasitic resistance and capacitance in vertical signal lines increase, causing focal plane phenomenon and reducing pixel readout speed
Solution Approach 1:
The pixel array is divided into multiple banks (e.g., four banks), and each bank is connected to separate readout circuits. This segmentation allows parallel readout operations across different banks, significantly increasing the overall pixel readout speed while maintaining high image quality from the increased pixel count and light-receiving area.
2Speed
If the width of vertical signal lines is increased to reduce parasitic resistance, then pixel readout speed is improved, but the light-receiving area is reduced
Solution Approach 1:
By segmenting the pixel array into multiple banks with separate readout circuits, the signal line length for each bank is reduced. This segmentation allows for shorter, optimized signal paths that reduce parasitic resistance without requiring excessive line width, thereby preserving the light-receiving area while improving readout speed.
Solution Approach 2:
The patent introduces a bank dimension to the pixel array organization, arranging pixels in a three-dimensional structure (rows, columns, and banks). This dimensional reorganization allows parallel readout operations and reduces the effective signal path length in the vertical direction, improving readout speed without compromising the two-dimensional light-receiving area.
3Speed
If the wiring pitch of vertical signal lines is increased to reduce parasitic capacitance, then pixel readout speed is improved, but the pixel density is reduced
Solution Approach 1:
Segmenting the pixel array into multiple banks with independent readout circuits allows for optimized wiring pitch within each bank. The reduced number of pixels per bank enables adequate spacing between signal lines, reducing parasitic capacitance while maintaining high overall pixel density through the combined banks.
4Speed
If the vertical signal lines are electrically disconnected in the pixel region to reduce parasitic resistance and capacitance, then pixel readout speed is improved, but device complexity increases
Solution Approach 1:
The electrical disconnection of vertical signal lines is implemented through bank segmentation, where each bank has its own dedicated readout circuitry. This segmentation approach systematically manages the complexity by creating modular, independent units rather than requiring complex routing and switching arrangements, making the disconnection strategy more implementable while maintaining improved readout speed.
Data Source
AI summary
An image pickup element includes a plurality of read signal lines; a pixel unit in which a plurality of pixel circuits are arranged in a matrix form, the plurality of pixel circuits in the pixel unit being divided into groups of pixel circuits so that each of the groups is provided in a corresponding one of columns, each of the groups of pixel circuits being connected to a corresponding one of the plurality of read signal lines; and a processing unit configured to process read signals that the plurality of pixel circuits, which are divided into groups, output to the plurality of read signal lines, which are connected to the plurality of pixel circuits.