CMOS Image Sensor Pixel Layout for Lower Dark Current

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Solution Overview

Problem

CMOS image sensors experience dark current imbalances due to the proximity of the pick-up well contact region to the photodetectors and floating diffusion node, leading to increased dark current and poor performance.

Innovation Solution

The pick-up well contact region is positioned at an equal distance from all photodetectors, and separated from the floating diffusion node by a path between adjacent photodetectors, reducing dark current imbalances and allowing the floating diffusion node to drain dark current before it interacts with the photodetectors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the pick-up well contact region is positioned close to the photodetectors and floating diffusion node, then device complexity is reduced and manufacturing is simplified, but dark current increases and performance deteriorates

Engineering Contradiction:
Improvedevice complexityVSAvoiddark current
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediate region (isolation region or depleted region) between the pick-up well contact region and the photodetectors/floating diffusion node. This intermediary structure blocks the direct path of dark current while maintaining the electrical connectivity needed for device operation, thus resolving the contradiction between simplified device layout and dark current suppression.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the device structure by creating distinct regions: a pick-up well contact region, an intermediate isolation region, and a photodetector region with floating diffusion node. This segmentation allows each region to be optimized independently - the contact region for electrical connection and the photodetector region for signal detection with minimal dark current interference.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If the pick-up well contact region is positioned close to the floating diffusion node, then manufacturing precision requirements are reduced, but dark current imbalance increases and performance worsens

Engineering Contradiction:
Improvemanufacturing precisionVSAvoiddark current performance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The isolation region acts as a mediator that decouples the positioning relationship between the pick-up well contact region and the floating diffusion node. By introducing this intermediate barrier, the design relaxes manufacturing precision requirements while maintaining reliable dark current performance through the physical separation provided by the isolation region.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-affected harmful factors

If the pick-up well contact region is separated from the floating diffusion node by a path between adjacent photodetectors, then dark current is reduced, but device complexity increases

Engineering Contradiction:
Improvedark currentVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the isolation function with existing device structures by utilizing the region between adjacent photodetectors as the dark current blocking path. This merging approach achieves dark current suppression without adding separate isolated structures, thus minimizing the increase in device complexity while effectively reducing dark current.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12040336B2Semiconductor imaging device having improved dark current performance
Publication Date: 2024.07.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12040336B2 patent drawing
  • US12040336B2 patent drawing
  • US12040336B2 patent drawing

AI summary

In some embodiments, the present disclosure relates to method for forming an image sensor integrated chip. The method includes forming a first photodetector region in a substrate and forming a second photodetector region in the substrate. A floating diffusion node is formed in the substrate between the first photodetector region and the second photodetector region. A pick-up well contact region is formed in the substrate. A first line intersects the floating diffusion node and the pick-up well contact region. One or more transistor gates are formed on the substrate. A second line that is perpendicular to the first line intersects the pick-up well contact region and the one or more transistor gates.