CMOS Image Sensor Pixel with Vertically Integrated Diodes
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Solution Overview
Problem
Current CMOS image sensors with small pixel sizes face challenges in reducing noise and maintaining sensitivity due to the need for shared circuitry and asymmetrical layouts, which increase FD node capacitance and occupy valuable active pixel area.
Innovation Solution
The implementation of a 2T CMOS image sensor pixel using vertically integrated set and reset diodes, eliminating the need for additional transistors and allowing for a compact layout without circuit sharing, thereby minimizing pixel area and maintaining sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If typical reset and addressing transistors are used in CMOS image sensors, then the pixel can perform standard low noise correlated double sampling operation, but the pixel area becomes larger and occupies valuable active pixel area
Solution Approach 1:
The patent extracts the reset and addressing functions from transistors and implements them using diodes instead. Specifically, a reset diode is used to reset the floating diffusion node by conducting charge to a reference voltage, and an addressing diode is used to selectively connect pixel outputs to column buses. This substitution of diodes for transistors reduces the pixel area while maintaining the necessary functionality for correlated double sampling noise reduction.
Solution Approach 2:
The patent employs vertically integrated diodes that extend through multiple interconnect layers (e.g., from first interconnect layer through second interconnect layer). This three-dimensional vertical integration allows the diodes to occupy less horizontal pixel area while still providing the required electrical connections and functions, effectively moving the solution from a two-dimensional plane to a three-dimensional space.
2Area of stationary object
If circuit sharing is used to reduce pixel area, then the pixel size is reduced, but the FD node capacitance increases and sensitivity is reduced
Solution Approach 1:
The patent eliminates the need for circuit sharing by extracting the addressing function from shared column bus transistors and implementing dedicated addressing diodes at each pixel. This allows each pixel to have its own direct connection to column buses through the addressing diode, avoiding the capacitance loading effects of shared circuitry while maintaining compact pixel dimensions.
3Area of stationary object
If asymmetrical layout is used to accommodate circuit components, then the pixel can be compact, but noise performance and symmetry are compromised
Solution Approach 1:
The patent achieves symmetrical pixel layouts by strategically positioning the reset diode and addressing diode in complementary locations. The reset diode connects to a reference voltage through one interconnect layer while the addressing diode connects to column buses through another interconnect layer, creating a balanced symmetrical arrangement that minimizes noise and maintains uniform electrical characteristics across the pixel array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances Quantum Efficiency, Dynamic Range, and Signal to Noise Ratio by optimizing pixel layout and reducing noise, while maintaining compactness and symmetry, thus improving overall sensor performance.
Implementation Method 1
Typical image sensors sense light by converting impinging photons into electrons that are integrated (collected) in sensor pixels
Data Source
AI summary
A pixel of an image sensor, the pixel includes a floating diffusion node to sense photo-generated charge, a reset diode to reset the floating diffusion node in response to a reset signal, and a set diode to set the floating diffusion node.