CMOS Pixel LOFIC Reset Circuit for Reduced HDR Image Lag
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Solution Overview
Problem
High dynamic range (HDR) image sensors face challenges with image lag due to the increased capacitance of lateral overflow integration capacitors (LOFICs), which results in slower frame rates and degraded image quality, as high-k materials used in LOFICs exhibit hysteresis characteristics and slow relaxation behavior.
Innovation Solution
Incorporating a reset transistor to auto-zero the LOFIC during idle and precharge periods, allowing both metal electrodes of the LOFIC to be short-circuited to a bias voltage, reducing image lag by shortening the discharge time and minimizing RC loading, thus enabling reduced horizontal banding noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If high-k materials are used in LOFICs to increase capacitance for HDR capability, then dynamic range is improved, but image lag increases due to hysteresis characteristics and slow relaxation behavior
Solution Approach 1:
The patent applies preliminary action by resetting the LOFIC capacitor during idle periods before the next integration cycle begins. The reset transistor is activated during idle time to discharge accumulated charge from the high-k capacitor, preparing it for the next measurement cycle. This preliminary reset action prevents image lag from carrying over between frames while preserving the high capacitance needed for HDR capability.
2Quantity of substance
If LOFIC capacitance is increased to capture more image charge for HDR, then full well capacity is improved, but frame rate decreases due to slower discharge time
Solution Approach 1:
The patent implements periodic action by systematically resetting the LOFIC capacitor at regular intervals during idle periods between frame integrations. This periodic reset mechanism ensures the capacitor is prepared for each new integration cycle, enabling high full well capacity during integration while maintaining fast frame rates through efficient periodic discharge during idle time.
3Adaptability or versatility
If LOFIC capacitance is increased to store more charge, then dynamic range is improved, but horizontal banding noise increases due to RC loading effects
Solution Approach 1:
The patent applies preliminary action by resetting the LOFIC capacitor during idle periods before the next integration cycle begins. The reset transistor is activated during idle time to discharge accumulated charge from the high-k capacitor, preparing it for the next measurement cycle. This preliminary reset action prevents image lag from carrying over between frames while preserving the high capacitance needed for HDR capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces image lag and horizontal banding noise, enhancing the high dynamic range capabilities of image sensors while maintaining efficient row driver control, thereby improving image acquisition and quality.
Implementation Method 1
The image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and photogenerate image charge upon absorption of the image light
Implementation Method 2
The LOFIC is a metal-insulator-metal (MIM) storage capacitor that includes a high-k insulating region disposed between a first metal electrode and a second metal electrode
Data Source
AI summary
A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a bias voltage source and the floating diffusion. The reset transistor is configured to be switched in response to a reset control signal. A lateral overflow integration capacitor (LOFIC) including an insulating region disposed between a first metal electrode and a second metal electrode is also included. The first metal electrode is coupled to a bias voltage source. The second metal electrode is coupled to the reset transistor and selectively coupled to the floating diffusion.