3T CMOS Image Sensor Pixel Without Address Transistor
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Solution Overview
Problem
Conventional CMOS image sensors with four transistors (4T) require a large active pixel area, increase pixel capacitance due to circuit sharing, and result in asymmetrical layouts and electrical cross-talk issues, limiting their sensitivity and optical performance.
Innovation Solution
A CMOS image sensor pixel design using only three transistors, with two row and two column lines, employing p-channel MOS transistors for charge sensing and resetting, eliminating the need for addressing transistors and allowing full Correlated Double Sampling (CDS) operation for noise reduction without circuit sharing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If four transistors are used in the pixel circuit, then noise reduction through Correlated Double Sampling is achieved, but pixel area increases and sensitivity decreases
Solution Approach 1:
The invention extracts and removes the address transistor from the conventional 4T pixel circuit, reducing the transistor count from 4 to 3. This elimination maintains the essential CDS noise reduction functionality through the remaining reset and sense transistors while freeing up pixel area for improved sensitivity and charge storage capacity.
2Ease of operation
If addressing transistors are used for pixel scanning, then pixel selection and signal transfer are enabled, but pixel area is consumed and optical aperture is reduced
Solution Approach 1:
The invention merges the addressing function into the row control architecture by using row select signals that control multiple pixels simultaneously through shared column lines. This consolidation eliminates the need for individual address transistors in each pixel, freeing area while maintaining scanning and selection capabilities through external row control logic.
3Device complexity
If circuit sharing is implemented between neighboring pixels, then transistor count per pixel is reduced, but pixel capacitance increases and cross-talk occurs
Solution Approach 1:
The invention segments the pixel circuit into functionally independent components: a 3T pixel circuit unit with dedicated reset and sense transistors, combined with external row and column control logic. This segmentation maintains low per-pixel complexity while isolating pixels electrically to prevent cross-talk, as each pixel's floating diffusion node remains independent during charge transfer and readout operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves smaller pixel sizes with increased charge conversion gain, improved sensitivity, and reduced noise, maintaining symmetry and optical aperture while eliminating kTC reset noise.
Implementation Method 1
Typical image sensors sense light by converting impinging photons into electrons that are integrated (collected) in sensor pixels
Implementation Method 2
a transferring device for transferring charge integrated in the pinned photodiode in response to a transfer control signal
Implementation Method 3
During reset the transistor is turned on, thereby momentarily conductively connecting the FD node to a voltage reference. Through this step, collected charge is removed from the pixels; however, kTC-reset noise is generated
Implementation Method 4
The subtraction of the reset level from the signal level is called Correlated Double Sampling, CDS, which removes the kTC noise and the transistor threshold non-uniformities from the signal to be output
Data Source
AI summary
The invention describes in detail a solid-state CMOS image sensor, specifically the CMOS image sensor pixel that has only two row lines per pixel, pinned photodiode for sensing light, and one or two column lines. The pixel does not have an address transistor and the sensing and reset transistors are both MOS p-channel type. This architecture results in a low noise operation with a very small output transistor random noise. In addition this new pixel architecture allows for the standard CDS signal processing operation, which reduces the pixel to pixel non-uniformities and minimizes kTC reset noise. The pixel has high sensitivity, high conversion gain, high response uniformity, and low noise, which is enabled by the efficient 3T pixel layout.


