CMOS Pixel Output Level Control for Fixed Pattern Noise Reduction
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Solution Overview
Problem
As the size of a CMOS image sensor's pixel array increases, the row line readout time decreases, making it difficult to secure sufficient transfer time for pixel signals, leading to potential image degradation due to fixed pattern noise (FPN) caused by uneven loading capacitance and pixel bias circuit differences.
Innovation Solution
A pixel output level control device is introduced, comprising a pixel output level control unit and a retention unit, using inverted cell select signals and NMOS-type transistors to control and maintain the pixel output level, ensuring sufficient transfer time and preventing FPN across column lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel array size is increased, then the sensor resolution is improved, but the row line readout time is decreased and transfer time is insufficient
Solution Approach 1:
The pixel output level control unit proactively controls the pixel output level during the period when the transfer signal is activated and the cell select signal is deactivated, before the pixel signal transfer begins. This preliminary control ensures that the pixel signal is already at the correct level when transfer starts, eliminating settling time issues and resolving the contradiction between high resolution and sufficient transfer time
Solution Approach 2:
The pixel output level control unit acts as an intermediary between the pixel array and the readout circuit. It receives the inverted cell select signal and generates a control signal to adjust the pixel output level, mediating the signal transfer process to ensure proper timing and level settlement without requiring additional transfer time
2Measurement precision
If the pixel array size is increased, then the sensor resolution is improved, but the loading capacitance of pixel output line is increased
Solution Approach 1:
The invention changes the timing parameter of the pixel output level control by using an inverted cell select signal with inverted timing relative to the original cell select signal. This parameter change allows the pixel output level to be controlled during the transfer period, compensating for the increased loading capacitance effect and preventing FPN without requiring physical changes to the pixel array structure
3Productivity
If the pixel signal transfer time is insufficient, then the readout speed is improved, but the pixel signal is not settled and FPN occurs
Solution Approach 1:
The pixel output level control unit performs preliminary control of the pixel output level during the transfer period, before the pixel signal needs to be settled. By proactively adjusting the output level using the inverted cell select signal, the signal is already settled when it reaches the readout circuit, maintaining both high readout speed and signal reliability
Solution Approach 2:
The control mechanism uses the inverted cell select signal as a feedback trigger to adjust the pixel output level. The inverted timing creates a feedback loop that ensures the output level is controlled at the appropriate moment during the transfer cycle, guaranteeing signal settlement without compromising readout speed
Data Source
AI summary
A pixel output level control device may include: a pixel output level control unit suitable for controlling a pixel output level of a pixel signal of a pixel for reducing the time required for settling the pixel signal during a specific period; and a pixel output level retention unit suitable for maintaining the pixel output level of the pixel signal during the specific period to a fixed value, according to control of the pixel output level control unit.