CMOS Image Sensor Pixel Selectable Charge Binning
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Solution Overview
Problem
CMOS Active Pixel Sensor pixel architectures face issues with low charge-to-voltage conversion region capacitance, lack of in-pixel charge domain binning, reduced fill factor, and systematic differences in photoresponse leading to image quality degradation.
Innovation Solution
A CMOS active pixel sensor design with a five-transistor or six-transistor pixel architecture that enables selectable conversion gain and charge domain binning in both vertical and horizontal directions through the selective connection of charge-to-voltage conversion regions, maintaining pixel symmetry and global shutter capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the charge-to-voltage conversion region capacitance is increased by incorporating an added capacitance in each pixel, then the output response linearity is improved, but the fill factor of the pixel is reduced
Solution Approach 1:
The patent merges the charge-to-voltage conversion regions of multiple adjacent pixels by selectively connecting them through transfer gates. This allows the capacitance of the floating diffusion to be effectively increased by combining multiple regions, improving output response linearity without requiring additional capacitance structures within each individual pixel that would reduce fill factor.
Solution Approach 2:
The floating diffusion region serves multiple functions: it acts as both the charge-to-voltage conversion region and the charge storage region. This multi-functionality eliminates the need for separate added capacitance structures, maintaining high fill factor while providing sufficient capacitance for linear output response through the selective binning capability.
2Area of stationary object
If the charge-to-voltage conversion region is shared by adjacent pixels, then the fill factor is maintained, but the pixel symmetry is broken and systematic differences in photoresponse occur
Solution Approach 1:
The patent implements dynamic connectivity where transfer gates can selectively connect or disconnect charge-to-voltage conversion regions based on readout mode requirements. In full-resolution mode, pixels operate independently maintaining symmetry and uniform photoresponse. In binning mode, adjacent pixels are dynamically connected to increase effective capacitance, achieving both high fill factor and linear output response as needed.
3Device complexity
If the charge-to-voltage conversion region is shared by adjacent pixels, then the device complexity is reduced, but the global shutter capability is lost
Solution Approach 1:
The patent segments the charge-to-voltage conversion function into separate floating diffusion regions for each pixel, with selective connectivity controlled by transfer gates. This segmentation allows each pixel to independently perform charge-to-voltage conversion when needed for global shutter operation, while still enabling shared capacitance through selective binning when operating in reduced-resolution mode, thus maintaining both global shutter capability and flexible binning functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances data rate for reduced resolution readout, maintains pixel symmetry, and reduces fixed pattern noise, while allowing for configurable charge domain binning and increased capacitance without reducing the fill factor, thereby improving image quality and dynamic range.
Implementation Method 1
a photodetector n-PD for capturing incident light and converting it into charge
Data Source
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Figure 4
AI summary
An image sensor includes a plurality of pixels, at least two pixels each having a photodetector; a charge-to-voltage conversion region; an input to an amplifier; and a switch for selectively connecting the charge-to-voltage conversion regions.