CMOS Image Sensor Pixel Storage Node Linked to Transfer Gate
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Solution Overview
Problem
CMOS imager pixels suffer from low signal-to-noise ratios and narrow dynamic range due to inadequate charge collection, transfer, and storage, as well as thermal noise during reset, which limits their ability to fully utilize the charge generated by photosensors.
Innovation Solution
The implementation of a global electronic shutter that transfers electrons to a storage node with increased capacitance, allowing for double sampling and reduced kTC noise, along with sharing of floating diffusion nodes and readout circuitry among multiple pixels to enhance charge storage capacity and collection area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional pixel structure with floating diffusion node is used, then the pixel can be reset and readout, but the storage capacitance is insufficient leading to low signal-to-noise ratio and narrow dynamic range
Solution Approach 1:
The pixel structure is segmented into two distinct nodes: a floating diffusion node for reset and readout operations, and a storage node for charge accumulation. This segmentation allows each node to be optimized for its specific function, with the storage node providing increased capacitance for better signal-to-noise ratio while the floating diffusion node handles the reset operation.
Solution Approach 2:
A transfer gate is introduced as an intermediary element between the photosensor and the storage node. This transfer gate mediates the charge transfer process, enabling efficient movement of photo-generated charges to the storage node while isolating the floating diffusion node during the integration period, thereby reducing noise and improving signal quality.
2Adaptability or versatility
If additional gates are added to increase functional operations (electronic shuttering), then the pixel functionality is enhanced, but the pixel size increases or fill factor is reduced
Solution Approach 1:
The storage node serves multiple functions: it acts as a charge storage element with increased capacitance, functions as an electronic shutter by controlling charge transfer timing, and enables double sampling for noise reduction. This multi-functionality eliminates the need for separate electronic shutter gates, maintaining pixel area while enhancing functionality.
Solution Approach 2:
The electronic shuttering function is merged with the charge storage operation. The storage node's capacitance and transfer gate control are combined to achieve both charge accumulation and electronic shuttering in a single integrated mechanism, rather than requiring separate dedicated gates for each function.
3Device complexity
If the floating diffusion node is used for charge storage, then the structure is simple, but kTC noise is generated during reset
Solution Approach 1:
The charge storage function is extracted from the floating diffusion node and placed in a dedicated storage node. This extraction allows the floating diffusion node to be used exclusively for reset and readout operations, enabling double sampling that eliminates kTC noise, while the storage node provides isolated charge accumulation without generating reset noise.
Solution Approach 2:
The storage node allows for preliminary charge accumulation before transfer to the floating diffusion node. This preliminary action enables the floating diffusion node to be reset and readout first (capturing the reset level), then charged later (capturing the signal level), facilitating double sampling that removes kTC noise from the final measurement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the storage capacity and signal-to-noise ratio of imager pixels, reduces thermal noise, and allows for a larger charge generating area, resulting in improved image quality and reduced pixel size.
Implementation Method 1
The storage node is capacitively linked to the shutter clock to increase the storage capacitance of the storage node and to clock (i.e., drive) charges by increasing and decreasing the potential at the storage node
Implementation Method 2
Each pixel cell includes a photodiode connected to the storage node for generating an electrical charge in response to incident light
Data Source
AI summary
A CMOS imaging system with increased charge storage capacitance of pixels yet decreased physical size, kTC noise and active area. A capacitor is linked to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutter gate on during the integration period to increase the amount of time for charge storage by a pixel.