3TR CMOS Image Sensor Pixel Voltage Boosting for Signal Transfer
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Solution Overview
Problem
In miniaturized CMOS image sensors, the downsizing of photodiodes and amplification type MOS transistors leads to decreased signal charge and increased noise, necessitating a configuration that secures sufficient electric potential difference between the photoelectric conversion element and the signal charge accumulation section for complete signal transfer without afterimages.
Innovation Solution
A solid-state image capturing apparatus with a 3TR configuration pixel array, where a voltage greater than the absolute value of the power supply voltage is supplied to the reset transistor, using a charge pump circuit for boosting, and employing depletion type transistors to maintain a high reset electric potential, ensuring complete and stable signal charge transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If photodiodes and amplification type MOS transistors are miniaturized to reduce pixel size, then device area is reduced, but signal charge decreases and noise increases
Solution Approach 1:
The invention changes the voltage parameter by applying a reset voltage higher than the power supply voltage to the reset transistor. This elevated voltage ensures sufficient electric potential difference between the photoelectric conversion element and signal charge accumulation section, enabling complete signal transfer even with miniaturized components that produce lower signal charge.
2Area of moving object
If photodiodes are miniaturized, then pixel area is reduced, but electric potential difference between photoelectric conversion element and signal charge accumulation section becomes insufficient
Solution Approach 1:
The invention modifies the voltage parameter by supplying a reset voltage that exceeds the power supply voltage to the reset transistor. This parameter change ensures that sufficient electric potential difference is maintained between the photoelectric conversion element and signal charge accumulation section, enabling complete signal charge transfer even when the photoelectric conversion element area is reduced.
3Reliability
If signal charge accumulation section voltage is increased to improve signal transfer, then signal transfer completeness improves, but power consumption increases
Solution Approach 1:
The invention applies the elevated reset voltage only during the reset operation, which is a preliminary action performed before signal charge transfer. This temporary voltage boost ensures complete signal transfer without requiring sustained high voltage during normal operation, thereby minimizing power consumption while achieving reliable signal transfer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures a sufficient electric potential difference between the photoelectric conversion element and the signal charge accumulation section, facilitating complete and stable signal charge transfer without afterimages, even with miniaturized components.
Implementation Method 1
using a charge pump circuit for boosting
Implementation Method 2
a light receiving section 101 for converting light to electrons
Data Source
AI summary
In a three-TR configuration pixel, the solid-state image capturing apparatus according to the present invention is capable of securing an electric potential difference sufficiently between a signal voltage and a reset voltage at the transferring of a signal charge and performing complete transferring of the signal charge from a photoelectric conversion element to an FD section easily and stably. Each pixel section, constituting a pixel array, has a 3TR configuration including reset transistors, transfer transistors and amplifying transistors. In each row of the pixel array, provided are a level shifter for driving reset drain wiring connected to a drain of the reset transistor, with an electric potential higher than a power supply voltage, and another level shifter for driving a reset signal line connected to a gate of the reset transistor, with an electric potential higher than the power supply voltage.


