CMOS PLL Charge-Pump Smoothing for Low Spur Output
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Solution Overview
Problem
Prior CMOS Phase-Locked Loop (PLL) circuits face challenges in achieving low spurs and noise in output signals, particularly in high-speed serial transmission systems, where spurs cause ripple and frequency modulation, leading to unstable and noisy output waveforms.
Innovation Solution
The implementation of a low spurs CMOS PLL circuit using a Phase-Frequency Detector, charge-pumps, Switched-Capacitor Resistor (SCR), filter, and VCO circuit, where the SCR smooths current pulses from the charge-pump, reducing ripple and noise at the VCO input, thereby minimizing spurs and noise in the output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If prior art CMOS PLL circuits are used, then the circuit complexity is reduced, but the output signal exhibits high spurs and noise
Solution Approach 1:
A switched-capacitor resistor (SCR) is introduced as an intermediary component between the charge-pump and the VCO. The SCR smooths the current pulses from the charge-pump before they reach the VCO, reducing the ripple that causes spurs and noise in the output signal. This mediator approach allows the system to maintain simplicity while achieving low spurs performance.
2Object-generated harmful factors
If complex prior art techniques are used to reduce spurs, then the spurs are reduced, but the system reliability decreases
Solution Approach 1:
The switched-capacitor resistor serves as a reliable intermediary that smoothly conditions the charge-pump output. By using this well-defined circuit topology with standard CMOS components, the system achieves spur reduction through a predictable and reliable mechanism rather than complex or unstable techniques.
Solution Approach 2:
The SCR dynamically changes the resistance presented to the VCO by switching between different capacitor configurations. This parameter change smooths the current waveform and reduces the amplitude of ripple components that cause spurs, while maintaining system reliability through controlled parameter variation.
3Device complexity
If simple prior art techniques are used, then the circuit complexity is reduced, but the spurs and noise performance is insufficient
Solution Approach 1:
The switched-capacitor resistor is added as a single intermediary stage between the charge-pump and VCO. This minimal addition to the circuit complexity provides significant improvement in spurs and noise performance by smoothing the current waveform before it reaches the frequency-sensitive VCO.
Solution Approach 2:
The SCR changes the effective resistance and current waveform parameters dynamically during operation. By switching capacitors in and out of the circuit at specific phases, it transforms the pulsed current from the charge-pump into a smoother current that produces less ripple and fewer spurs.
Data Source
AI summary
A PLL circuit having a low spur output. The PLL circuit includes a PFD (Phase-Frequency Detector), a charge-pump coupled to the PFD, an SCR (switch-capacitor resistor) coupled to the charge pump, a filter coupled to the SCR, and a VCO circuit coupled to the filter, wherein the SCR reduces an amplitude of a plurality of current pulses at an output of the charge-pump before the plurality of current pulses reach an input of the VCL circuit.