CMOS Contact Potential Switching to Block Substrate Current

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Solution Overview

Problem

CMOS circuits in airbag ignition systems are prone to malfunctions due to the formation of parasitic bipolar transistors when external connections experience unintended potential drops, leading to substrate currents that can cause airbag failures.

Innovation Solution

A device is implemented to prevent substrate current injection by monitoring the potential of external contacts and connecting them to a reference potential line when the potential falls below a threshold, using a switching transistor to divert current away from parasitic structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If deep trench isolation structures are used to reduce substrate current, then substrate current reduction is achieved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvesubstrate currentVSAvoidisolation structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The invention extracts the substrate current blocking function from the complex deep trench isolation structure and implements it through a simplified potential management approach using existing P-well and N-well regions. By controlling the electrical potential of these pre-existing structures, the patent achieves substrate current reduction without requiring additional deep trench isolation elements, thus eliminating the complexity associated with deep trench fabrication while maintaining effective substrate current blocking.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces potential control mechanisms (such as dedicated control electrodes or existing well structures) as intermediaries to manage substrate current. These intermediaries regulate the electrical potential between the substrate and isolation structures, preventing substrate current injection without requiring the physical complexity of deep trench isolation. The intermediary potential control layer mediates between the substrate and isolation regions to achieve current blocking through electrical rather than purely structural means.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If deep trench isolation structures are implemented, then substrate current is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvesubstrate currentVSAvoidtrench depth and alignment precision
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The invention removes the requirement for deep trench isolation structures and their associated stringent manufacturing precision requirements. Instead, it utilizes standard CMOS fabrication processes to create P-well and N-well regions with常规 precision, controlling substrate current through potential management rather than through precisely fabricated deep trenches. This extraction of the deep trench requirement significantly reduces manufacturing precision demands while maintaining substrate current reduction effectiveness.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the approach from structural parameters (trench depth, width, alignment) to electrical parameters (potential control, biasing schemes). By controlling the electrical potential of well regions and isolation structures rather than relying on precise physical dimensions, the invention achieves substrate current reduction through electrical parameter optimization, which has more relaxed manufacturing precision requirements compared to deep trench geometric precision.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If potential control mechanisms are added to prevent substrate current, then substrate current is reduced, but device complexity increases

Engineering Contradiction:
Improvesubstrate currentVSAvoidcircuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent designs potential control mechanisms that serve multiple functions: they control substrate current potential, provide signal routing paths, and can be integrated with existing CMOS circuit blocks. By making these control structures multi-functional, the patent reduces the need for separate dedicated components, thereby limiting the increase in overall device complexity while achieving effective substrate current reduction through potential management.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents substrate current flow, thereby mitigating malfunctions in CMOS circuits and ensuring reliable airbag deployment by diverting current through a reference potential line.

Implementation Method 1

a detection circuit (202, 203) for detecting a potential of a contact (PDH, PDL)

Methodology Applied
Scientific EffectElectrical potential detection: Electric Field

Implementation Method 2

a switching circuit (204, 205) for connecting the contact (PDH, PDL) to a leakage circuit node (ABK)

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentEP4236073B1Apparatus and method for preventing substrate current in IC semiconductor substrate
Publication Date: 2026.04.22 ELMOS SEMICON AG
  • EP4236073B1 patent drawingFigure 1a
  • EP4236073B1 patent drawingFigure 1b~1c
  • EP4236073B1 patent drawingFigure 2

AI summary

The invention relates to various devices and methods for preventing the injection of a substrate current into the substrate sub of a CMOS circuit. For this purpose, the devices implement different methods for preventing such injection. They detect the potential of a contact (PDH, PDL) of the integrated CMOS circuit, compare the value of the detected potential with a reference value, and connect the contact (PDH, PDL) to a leakage circuit node (ABK) to drain the current, so that it does not flow through the parasitic bipolar lateral structure, i.e., not into the substrate. The leakage circuit node can be connected, for example, to the reference potential line (GND) or to another line that has a higher potential than that of the reference potential line (GND). This electrical connection is then activated or...initiated when the potential value of the contact (PDH, PDL) is below or equal to a reference value, where this reference value is below the potential value of the substrate Sub and/or below the potential value of the reference potential line (GND) or the other line mentioned above.