CMOS Probe Circuit for Low Power Signal Testing
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Solution Overview
Problem
Conventional probe test devices for integrated circuits often fail to detect failures in sensitive circuits and can impair their performance, particularly when testing low-power oscillator circuits with slow slew-rate square waves.
Innovation Solution
A probe test circuit is designed as a CMOS inverter circuit with electrically separated probe test points that are only connected when a probe pin is applied, activating the circuit only during testing to minimize power consumption and avoid damaging the circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional probe test device is used to test sensitive circuits, then the testing can be performed continuously, but the device fails to detect failures and impairs circuit performance due to excessive power consumption
Solution Approach 1:
The probe test circuit is activated only during probe test events rather than continuously. The circuit includes a first probe pad and second probe pad that are electrically separated during normal operation and only connected when a probe is applied, enabling testing on-demand while preserving circuit functionality during non-testing periods.
Solution Approach 2:
The probe test circuit is electrically separated from the functional circuitry during normal operation. The first probe pad and second probe pad are isolated from each other and from the functional circuit, extracting the testing function as a separate, optional component that does not interfere with normal circuit operation.
2Ease of operation
If the probe test circuit is always connected, then testing can be performed at any time, but power consumption increases and affects low-power circuit operation
Solution Approach 1:
The probe test circuit operates in a periodic manner, being activated only when needed for testing. The electrical connection between the first probe pad and second probe pad is established temporarily during probe events and disconnected otherwise, enabling testing availability without continuous power consumption.
Solution Approach 2:
The probe test circuit transitions between two states: disconnected during normal low-power operation and connected during testing. This dynamic configuration allows the circuit to adapt its connectivity based on operational requirements, maintaining low power consumption while enabling testing when needed.
3Use of energy by moving object
If the probe test circuit is electrically separated, then power consumption is reduced, but the circuit cannot be tested without applying a probe
Solution Approach 1:
The probe test circuit is segmented into separate probe pads (first probe pad and second probe pad) that are electrically isolated during normal operation. This segmentation reduces power consumption while maintaining testing accessibility, as the pads can be individually accessed by a probe when testing is required.
Data Source
AI summary
An integrated circuit probing structure (40) is provided for evaluating functional circuitry (42), such as a slow slew-rate square wave signal from a low power circuit, where the probing structure includes two or more probe pads (48, 49) for testing the functional circuitry which are formed to be electrically separate from one another, and a probe test circuit (46) connected to the functional circuitry (42) for conveying a signal from the functional circuitry to a probe needle (47) only when the probe needle (47) electrically connects the two or more probe pads (48, 49).