Analog CMOS PUF Temperature Compensation for Stable Output Yield
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Solution Overview
Problem
Analog CMOS-based physically unclonable functions (PUFs) suffer from significant yield losses due to temperature variations, leading to reduced output bits, as they are designed for a narrower temperature range than the operational range encountered in field conditions, resulting in a substantial loss of functionality.
Innovation Solution
A current-based temperature compensation circuit comprising a reference buffer, a biasing current mirror, and a controller that compensates the output of the CMOS PUF cell by using a weighted sum of bandgap current, current proportional to absolute temperature, and current complementary to absolute temperature, thereby improving temperature stability without increasing power dissipation or complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the CMOS PUF cell operates over an extended temperature range (−55°C to 125°C), then the device can function in field conditions, but the output varies with temperature causing significant yield losses
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the biasing voltage applied to the PUF cell based on temperature. A temperature sensor detects the current temperature, and a control circuit modifies the biasing voltage accordingly to compensate for temperature-induced variations in the PUF output, thereby maintaining output stability across the extended temperature range
Solution Approach 2:
The patent implements feedback through a temperature sensing mechanism that continuously monitors temperature and feeds this information to a control circuit. The control circuit uses this feedback to adjust the biasing voltage in real-time, creating a closed-loop system that maintains output stability despite temperature variations
2Reliability
If the PUF cell is designed for a narrow temperature range (0°C to 35°C), then output stability is maintained, but the device cannot function in extended field conditions (−55°C to 125°C)
Solution Approach 1:
The patent changes the operating parameters by introducing temperature-dependent biasing voltage adjustment. The control circuit modifies the biasing voltage based on temperature sensor readings, allowing the PUF cell to maintain its stable output characteristics across a much wider temperature range than originally designed
3Reliability
If temperature compensation is implemented, then yield is enhanced and output stability is maintained, but device complexity increases
Solution Approach 1:
The patent introduces intermediary components (temperature sensor and control circuit) that mediate between the temperature environment and the PUF cell. These intermediaries translate temperature variations into appropriate biasing voltage adjustments, protecting the PUF cell from direct temperature effects while maintaining relatively simple integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the yield of CMOS PUF cells by maintaining output stability across an extended temperature range, reducing bit loss and improving overall performance without the need for redundant cells or complex state machine-controlled loops.
Implementation Method 1
a weighted sum of a bandgap current, a current proportional to absolute temperature, and a current complementary to absolute temperature
Implementation Method 2
The controller is configured to compensate an output of the CMOS PUF cell for temperature variation
Data Source
AI summary
An apparatus includes a current-based temperature compensation circuit having a reference buffer, a biasing current mirror, and a controller. The reference buffer is configured to receive a biasing reference voltage at a voltage input terminal and replicate the biasing reference voltage to first and second buffer terminals. At least one of the first and second buffer terminals is configured to be electrically connected to at least one gate terminal of an analog complementary metal oxide semiconductor (CMOS) physically unclonable function (PUF) cell. The biasing current mirror is configured to receive a reference current at a current input terminal and replicate the reference current to the first buffer terminal. The controller is configured to compensate an output of the CMOS PUF cell for temperature variation based on a weighted sum of a bandgap current, a current proportional to absolute temperature, and a current complementary to absolute temperature.