CMOS RAM Erasing Circuit for BIOS Reset via Power Button
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Solution Overview
Problem
Existing methods for restoring initial BIOS parameters in a computer system are inconvenient, requiring users to dismantle and reassemble the system to erase CMOS RAM, especially when incorrect BIOS settings cause startup failures.
Innovation Solution
A computer system with a triggering device and counter that generates an erasing signal for the CMOS RAM when the boosting procedure fails, allowing the user to restore initial BIOS parameters by repeatedly pressing the power button without disassembling the system, using a circuit with D-Type Flip Flops to detect multiple power-button presses and produce a CMOS-erasing signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the user dismantles and reassembles the system to erase CMOS RAM, then the initial BIOS parameters can be restored, but the operation becomes inconvenient and time-consuming
Solution Approach 1:
The system performs self-diagnosis and self-restoration by automatically detecting boot failures and erasing CMOS RAM through the counter circuit, eliminating the need for user disassembly operations. The computer system serves itself by restoring initial BIOS parameters when startup fails.
Solution Approach 2:
The counter circuit acts as an intermediary between the power button and CMOS RAM, translating multiple power-button presses into a CMOS-erasing signal. This intermediary mechanism enables parameter restoration without direct user intervention in hardware manipulation.
2Ease of operation
If the user manually erases CMOS RAM by removing RTC battery or changing jumper pins, then BIOS parameters are reset, but the process requires system disassembly
Solution Approach 1:
The patent replaces mechanical operations (removing battery, changing physical jumpers) with an electrical signal-based solution. The counter circuit generates electrical CMOS-erasing signals in response to power button presses, substituting mechanical disassembly with electronic control.
Solution Approach 2:
The counter circuit serves as an intermediary that translates user-friendly power button presses into the technical CMOS-erasing signal, eliminating the need for users to directly manipulate hardware components like batteries or jumpers.
3Reliability
If incorrect BIOS parameters are set, then the computer system experiences startup failure, but the user cannot correct parameters without erasing CMOS RAM
Solution Approach 1:
The system implements feedback by monitoring whether the boosting procedure succeeds or fails. When startup failure is detected, the counter circuit is activated to erase CMOS RAM, providing automatic corrective feedback based on system performance status.
Solution Approach 2:
The counter circuit is pre-configured to automatically execute the CMOS erasing operation when boot failure is detected, performing the corrective action before the user needs to manually intervene. This preliminary setup enables automatic recovery without user awareness of the failure condition.
Data Source
AI summary
A computer system includes a triggering device; and a motherboard, connected to the triggering device, further comprising: a memory stored with a setting parameter of a basic-input-output-system; and a counter connected between the triggering device and the memory; wherein an erasing signal, for erasing the memory, is outputted to the memory from the counter according to a triggering signal outputted from the triggering device while a boosting procedure cannot be successfully executed by the computer system.