CMOS Image Sensor Ramp Generator Using Current Subtraction

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Solution Overview

Problem

Conventional integrator type ramp signal generators for CMOS image sensors require large feedback capacitors, occupying significant chip area and consuming high power, which is challenging for achieving high frame rates and high gain while maintaining resolution.

Innovation Solution

A ramp signal generator with a reduced size feedback capacitor is achieved through current subtraction, utilizing current supply and current subtraction units with PMOS and NMOS transistors to adjust current ratios and generate a ramp signal, thereby minimizing the capacitance value.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional integrator type ramp signal generator is used, then the ramp signal can be generated for ADC conversion, but the feedback capacitor size becomes large and occupies significant chip area

Engineering Contradiction:
Improveramp signal generation capabilityVSAvoidfeedback capacitor area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the fundamental parameter of how the ramp signal is generated - transitioning from a capacitor-based integration approach to a current-based approach. By using current sources and current mirrors to directly generate the ramp signal without requiring large feedback capacitors, the chip area is significantly reduced while maintaining the necessary ramp signal generation capability for ADC conversion

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts and removes the large feedback capacitor from the traditional integrator circuit. By taking out the capacitor-based integration function and replacing it with a current-based ramp generation mechanism using current sources and mirrors, the design eliminates the area-consuming component while preserving the essential functionality

Inventive Principle:
Principle #2Taking out (Extraction)

2Area of stationary object

If the feedback capacitor size is reduced, then chip area is saved, but the power consumption and current control become more challenging

Engineering Contradiction:
Improvefeedback capacitor areaVSAvoidpower consumption
Core Design Contradiction:
Area of stationary objectVSUse of energy by stationary object

Solution Approach 1:

The patent employs feedback mechanisms through current mirrors that precisely replicate and control the current flowing through the ramp generation circuit. The current mirror structure provides automatic feedback control, ensuring stable current operation and efficient power usage without requiring large capacitors, thereby reducing both area and power consumption simultaneously

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The current-based ramp generation circuit is designed to be self-regulating through the inherent properties of current mirrors and current sources. The circuit automatically maintains proper current levels and operational parameters without requiring external power management components, achieving efficient power consumption with reduced capacitor size

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9681084B2Ramp signal generator and CMOS image sensor using the same
Publication Date: 2017.06.13 SK HYNIX INC
  • US9681084B2 patent drawing
  • US9681084B2 patent drawing
  • US9681084B2 patent drawing

AI summary

Disclosed are a ramp signal generator capable of reducing the size of a feedback capacitor by using a current subtraction and a CMOS image sensor using the same. The ramp signal generator may include a current supply unit suitable for supplying a first current; a current subtraction unit suitable for subtracting the first current from a second current, or the second current from the first current; and a ramp signal generation unit suitable for generating a ramp signal according to a third current and a reference voltage. The third current is a result of the subtraction.