CMOS Power-On Reset Circuit With Threshold-Tracking Deactivation
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Solution Overview
Problem
Existing power on reset (POR) circuits in electronic circuits face challenges such as incorrect initialization of sequential logic, failure to track CMOS thresholds, lack of hysteresis, and high current consumption, particularly in low voltage applications where the threshold for deactivation is narrow and susceptible to noise or fluctuations.
Innovation Solution
A low voltage CMOS power on reset circuit that uses a voltage detector coupled with NMOS and PMOS transistors to detect the sum of NMOS and PMOS thresholds, incorporating a feedback path and current control device to ensure accurate deactivation and immunity to supply noise, thereby ensuring correct initialization and operation of CMOS logic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a simple RC device with Schmitt trigger is used for power on reset, then the circuit complexity is low, but the current consumption is high and the threshold tracking is inaccurate
Solution Approach 1:
The patent changes the operating parameters by using CMOS transistors in saturation region to create voltage-dependent current sources that dynamically adjust the reset threshold voltage. This allows the threshold to track CMOS threshold voltages while maintaining low current consumption through parameter optimization rather than simple RC charging.
Solution Approach 2:
The patent replaces the mechanical RC charging system with an electronic system using CMOS transistors and current mirrors. This substitution eliminates the need for large external RC components and reduces current consumption by using transistor-based voltage generation that automatically tracks process and temperature variations.
2Reliability
If the POR deactivation threshold is set high to ensure proper initialization, then the initialization reliability is improved, but the circuit becomes susceptible to noise and fluctuations
Solution Approach 1:
The patent implements feedback through current mirrors that continuously monitor the reset threshold voltage and adjust the POR deactivation point. The feedback mechanism ensures that the threshold remains stable and tracks CMOS characteristics, preventing noise-induced premature deactivation while maintaining reliable initialization.
Solution Approach 2:
The patent provides beforehand cushioning by designing the POR circuit to deactivate at a threshold that accounts for potential noise and fluctuations. The circuit is designed with sufficient voltage margin and hysteresis to cushion against noise, ensuring that temporary voltage disturbances do not cause premature reset deactivation.
3Device complexity
If the POR circuit uses fixed threshold voltage, then the circuit design is simple, but it fails to track CMOS threshold variations with process and temperature
Solution Approach 1:
The patent achieves universality by designing a POR circuit that simultaneously performs multiple functions: voltage detection, threshold tracking, temperature compensation, and process variation adaptation. The CMOS transistor-based design inherently tracks process and temperature effects, providing adaptive functionality without requiring separate compensation circuits.
Solution Approach 2:
The patent implements self-service by using CMOS transistors whose threshold voltages naturally track with process and temperature variations. The POR circuit automatically adjusts its deactivation threshold based on the actual CMOS device characteristics without external intervention, making the system self-adapting to environmental changes.
4Use of energy by moving object
If a narrow voltage range is used for POR deactivation in low voltage applications, then the power efficiency is improved, but the initialization reliability deteriorates
Solution Approach 1:
The patent applies dynamics by making the POR deactivation threshold dynamic rather than fixed. The threshold voltage automatically adjusts based on the supply voltage level and CMOS operating conditions, allowing the circuit to maintain reliable initialization across a narrow voltage range while adapting to low-power operating conditions through continuous parameter adjustment.
Data Source
AI summary
An electronic circuit includes an illustrative low voltage CMOS power on reset circuit. The electronic circuit can comprise a power on reset circuit coupled between a supply voltage terminal and a signal node. The illustrative power on reset circuit comprises a voltage detector coupled to the supply voltage terminal which is configured to track CMOS thresholds and deactivate when supply voltage reaches a level for proper operation of CMOS logic.


