CMOS RF Matching Network for Hybrid Wi-Fi 6E Front Ends
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Solution Overview
Problem
Existing Wi-Fi terminals, particularly volume terminals, face challenges in improving transmission performance and frequency extension to Wi-Fi 6E specifications while maintaining cost-effectiveness, and flagship terminals suffer from performance deterioration due to the use of high-cost FEMs.
Innovation Solution
A CMOS chip integrating a compound semiconductor-based power cell and CMOS process-based passive design, featuring a signal converting circuit with multiple ports and matching networks, including an external matching network for impedance matching, supports both volume and flagship terminals by switching between low and high performance modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a compound-based front-end module (FEM) is used in flagship terminals to achieve higher performance, then transmission performance is improved, but manufacturing cost increases
Solution Approach 1:
The patent segments the FEM into two functional parts: a compound semiconductor power cell for high-performance amplification and a CMOS-based passive circuit for signal processing and impedance matching. This segmentation allows the expensive compound component to be used only where necessary for performance enhancement, while the majority of the circuit uses cost-effective CMOS technology.
Solution Approach 2:
The CMOS chip is designed to support both flagship and volume terminals through a universal architecture. The same CMOS chip can operate in high-performance mode with the compound power cell for flagship terminals and in cost-effective mode without the power cell for volume terminals, eliminating the need for separate product lines.
2Productivity
If a compound-based FEM is used to achieve higher performance, then transmission efficiency is improved, but device complexity increases
Solution Approach 1:
The patent merges the compound power cell with the CMOS passive circuit into a single integrated FEM module. The power cell is directly coupled with the CMOS output, eliminating the need for separate external components and complex interconnections, thereby reducing overall device complexity while maintaining high transmission efficiency.
3Reliability
If separate development is performed for volume and flagship terminals, then performance requirements are met, but development time and cost increase
Solution Approach 1:
The CMOS chip is designed as a universal platform that can serve both volume and flagship terminals. By configuring the same chip with or without the compound power cell, a single development cycle can produce both product variants, significantly reducing development time and costs compared to maintaining separate development lines.
4Reliability
If an external matching network is added for impedance matching of the compound semiconductor device, then impedance matching performance is improved, but area occupied increases
Solution Approach 1:
The external matching network is integrated directly into the CMOS chip, merging previously separate components into a unified structure. This integration achieves the required impedance matching performance while minimizing the total area occupied by eliminating redundant interconnections and packaging space.
Data Source
AI summary
A CMOS chip includes a signal converting circuit configured to convert a baseband signal and an RF signal, a plurality of ports through which the RF signal is transmitted or received, the plurality of ports being respectively included in a first transmission path, a second transmission path, and a reception path, and a plurality of matching networks connected to the signal converting circuit, the plurality of matching networks being respectively connected to the plurality of ports, a first matching network among the plurality of matching networks including an external matching network, and the external matching network being configured to perform an impedance matching of a compound semiconductor device.