CMOS RF Switch Simulation Using Key On/Off Parameter Extraction
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Solution Overview
Problem
Current methods for simulating CMOS radio frequency switches based on the SOI process are slow, leading to long design cycles due to the comprehensive but time-consuming simulation of various parameters.
Innovation Solution
A method and device that focus on calculating and outputting only the off-state capacitance and on-state resistance values of CMOS radio frequency switches, using specific functions and formulas to improve simulation speed, with the off-state capacitance calculated as C(XC1)=CDS1*W/NS and on-state resistance as R(XR1)=RDS1*NS/W*F(VG), where F(VG)=2/(PVG1+1+tanh(VG/PVG2).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If comprehensive simulation of all parameters is performed, then simulation accuracy is improved, but simulation speed deteriorates
Solution Approach 1:
The patent extracts and focuses only on the two most critical parameters (off-state capacitance and on-state resistance) from the comprehensive set of simulation parameters. By calculating only these essential parameters using simplified formulas rather than performing full comprehensive simulation, the method maintains sufficient simulation accuracy while dramatically improving simulation speed.
Solution Approach 2:
The patent applies partial action by computing only the necessary subset of parameters (off-state capacitance and on-state resistance) rather than all possible parameters. This partial simulation approach provides sufficient accuracy for design decisions while avoiding the time cost of complete comprehensive simulation.
2Measurement precision
If comprehensive simulation of all parameters is performed, then simulation accuracy is improved, but design cycle length deteriorates
Solution Approach 1:
The patent extracts only the essential parameters needed for design evaluation (off-state capacitance and on-state resistance) from the complete parameter set. This extraction approach maintains sufficient simulation accuracy for making design decisions while significantly reducing the time required, thus shortening the overall design cycle.
Solution Approach 2:
The patent implements partial simulation by calculating only the critical parameters rather than performing exhaustive comprehensive simulation. This partial approach provides adequate accuracy for design purposes while dramatically reducing computation time and shortening the design cycle.
Data Source
AI summary
The present disclosure provides a method and a device for simulation of a CMOS radio frequency switch and a communication terminal. The method includes: receiving a first value; obtaining a current value of a first function based on the first value, when the CMOS radio frequency switch is in an on-state, the value of the first function is a first function value, and when the CMOS radio frequency switch is in an off-state, the value of the first function is a second function value; receiving a second value; receiving a third value; outputting an off-state capacitance value of the CMOS radio frequency switch based on the second value and the third value; and outputting an on-state resistance value of the CMOS radio frequency switch based on the second value, the third value and the current value of the first function.