CMOS Image Sensor Superlattices Reduce Crosstalk
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Solution Overview
Problem
Current semiconductor devices, such as CMOS image sensors, face limitations in charge carrier mobility and crosstalk between adjacent pixels, which affect performance and efficiency.
Innovation Solution
The method involves forming a CMOS image sensor with laterally adjacent photodiodes on a semiconductor substrate, using retrograde wells and superlattices with stacked semiconductor and non-semiconductor monolayers to enhance charge carrier mobility and reduce crosstalk, incorporating shallow trench isolation regions and microlenses for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor structures are used in CMOS image sensors, then manufacturing is simpler, but charge carrier mobility is limited and crosstalk between adjacent pixels occurs
Solution Approach 1:
The patent applies composite materials by creating a superlattice structure composed of alternating layers of silicon and silicon-germanium. This composite structure combines the beneficial properties of both materials: silicon provides high charge carrier mobility while silicon-germanium offers strain engineering capabilities and optical absorption control. The periodic alternation of these materials at the nanoscale creates unique electronic band structures that enhance carrier transport while reducing crosstalk between adjacent photodiodes.
Solution Approach 2:
The patent implements another dimension by transitioning from conventional bulk semiconductor structures to a vertically stacked superlattice architecture. The superlattice introduces a new dimensional scale (nanoscale layering perpendicular to the substrate) that enables control of charge carrier behavior through quantum confinement effects and strain engineering in the vertical dimension, while maintaining lateral integration of multiple photodiodes for image sensing functionality.
2Productivity
If photodiodes are placed closer together to increase pixel density, then productivity increases, but crosstalk between adjacent pixels increases
Solution Approach 1:
The patent employs an intermediary approach by introducing a carefully engineered superlattice structure that acts as a selective barrier between adjacent photodiodes. The alternating silicon and silicon-germanium layers create potential barriers that block carrier diffusion laterally between pixels while maintaining vertical carrier collection efficiency. This intermediary structure enables high pixel density integration without suffering from crosstalk, as the superlattice selectively filters carrier transport directions.
3Reliability
If strained material layers are added to enhance carrier mobility, then charge carrier mobility improves, but manufacturing complexity increases
Solution Approach 1:
The patent applies parameter changes by systematically varying the composition ratio of silicon-germanium layers within the superlattice structure. By adjusting the germanium concentration and layer thickness parameters during epitaxial growth, the strain state in the silicon layers can be precisely controlled to optimize charge carrier mobility. This parameter tuning approach allows manufacturing optimization where standard epitaxial processes can produce the desired strained superlattice structures with controlled electrical and optical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in higher charge carrier mobility and reduced crosstalk between pixels, enhancing the overall performance of CMOS image sensors by modifying energy band structures and providing improved retrograde well profiles.
Implementation Method 1
enhancing the overall performance of CMOS image sensors by modifying energy band structures
Implementation Method 2
forming a retrograde well extending downward into the substrate from a surface thereof and having a second conductivity type
Implementation Method 3
forming a plurality of laterally adjacent photodiodes on a semiconductor substrate
Data Source
AI summary
A method for making a CMOS image sensor may include forming a plurality of laterally adjacent photodiodes on a semiconductor substrate having a first conductivity types by forming a retrograde well extending downward into the substrate from a surface thereof and having a second conductivity type, forming a first well around a periphery of the retrograde well also having the second conductivity type, and forming a second well within the retrograde well having the first conductivity type. Furthermore, first and second superlattices may be respectively formed overlying each of the first and second wells, with each of the first and second superlattices comprising a plurality of stacked groups of layers, and each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.