CMOS Sensor Array with Uncommitted Logic Integration

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Solution Overview

Problem

The existing use of separate chips for signal processing in CMOS image sensors is costly and inefficient, as large field programmable gate arrays (FPGAs) are often wasted in applications that require less processing power, leading to increased board space and power consumption.

Innovation Solution

A semiconductor system with a substrate hosting a CMOS sensor array surrounded by a structured array of uncommitted logic, which provides electrical interconnects to form higher-level functions, allowing for flexible configuration and integration of signal processing within a single chip, reducing the need for additional processing units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a large FPGA with millions of gates is used for signal processing, then processing power is improved, but cost increases significantly

Engineering Contradiction:
Improveprocessing powerVSAvoidcost
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent segments the processing requirements into different levels: a small fixed-function logic core for essential processing and a larger FPGA for additional processing power when needed. This segmentation allows the system to achieve necessary processing capability without the expense of using a large FPGA for all applications.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal platform that can serve multiple applications (optical mice, PC cameras, security cameras, machine vision) through a standardized sensor array interface combined with configurable logic. This multi-functionality eliminates the need for application-specific custom designs and reduces overall system cost.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If a standard high processing power FPGA is used, then processing capability is improved, but resource waste occurs

Engineering Contradiction:
Improveprocessing capabilityVSAvoidresource waste
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent implements a dynamic processing architecture where the logic core can be configured based on application requirements. Simple applications use only the small fixed-function core, while more complex applications can utilize the larger FPGA resources, allowing the system to dynamically adapt resource usage to actual needs and avoid waste.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If multiple integrated circuits are used for sensor and processing, then functional requirements are met, but board space increases

Engineering Contradiction:
Improvefunctional requirementsVSAvoidboard space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the sensor array and processing logic into a single integrated device. The sensor array is directly coupled with the logic core on the same substrate, eliminating the need for separate chips and reducing board space requirements while maintaining all necessary functional capabilities.

Inventive Principle:
Principle #5Merging (Combining)

4Adaptability or versatility

If multiple integrated circuits are used for sensor and processing, then functional requirements are met, but power consumption increases

Engineering Contradiction:
Improvefunctional requirementsVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

By merging the sensor array and processing logic into a single integrated device with direct coupling, the patent eliminates inter-chip communication overhead and reduces overall power consumption. The integrated architecture allows for optimized power management and reduces the energy required for data transfer between separate components.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7960767B2System for programmable gate array with sensor array
Publication Date: 2011.06.14 APTINA IMAGING CORP
  • US7960767B2 patent drawing
  • US7960767B2 patent drawing
  • US7960767B2 patent drawing

AI summary

The present invention provides providing a substrate, forming a sensor array on the substrate, forming a structured array of uncommitted logic surrounding the sensor array on the substrate, and providing electrical interconnects to the structured array of uncommitted logic, wherein the structured array of uncommitted logic forms functions that support the operation of the sensor array.